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TS2007 数据表(PDF) 23 Page - STMicroelectronics |
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TS2007 数据表(HTML) 23 Page - STMicroelectronics |
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23 / 29 page ![]() TS2007 Application information 23/29 So, for a desired cut-off frequency FCL we can calculate Cin: with FCL in Hz, Zin in Ω and Cin in F. The input impedance Zin is for the whole power supply voltage range, typically 75kΩ . There is also a tolerance around the typical value (see Table 5 to Table 9). With regard to the tolerance, you can also calculate tolerance of the FCL: ● ● 4.5 Decoupling of the circuit A power supply capacitor, referred to as CS, is needed to correctly bypass the TS2007. The TS2007 has a typical switching frequency of 280kHz and output fall and rise time about 5ns. Due to these very fast transients, careful decoupling is mandatory. A 1µF ceramic capacitor is enough, but it must be located very close to the TS2007 in order to avoid any extra parasitic inductance created by a long track wire. Parasitic loop inductance, in relation with di/dt, introduces overvoltage that decreases the global efficiency of the device and may cause, if this parasitic inductance is too high, a TS2007 breakdown. In addition, even if a ceramic capacitor has an adequate high frequency ESR value, its current capability is also important. A 0603 size is a good compromise, particularly when a 4 Ω load is used. Another important parameter is the rated voltage of the capacitor. A 1µF/6.3V capacitor used at 5V, loses about 50% of its value. With a power supply voltage of 5V, the decoupling value, instead of 1µF, could be reduced to 0.5µF. As CS has particular influence on the THD+N in the medium to high frequency region, this capacitor variation becomes decisive. In addition, less decoupling means higher overshoots which can be problematic if they reach the power supply AMR value (6V). 4.6 Wake-up time (twu) When the standby is released to set the device ON, there is a wait of 5ms typically. The TS2007 has an internal digital delay that mutes the outputs and releases them after this time in order to avoid any pop noise. Note: The gain increases smoothly (see Figure 49) from the mute to the gain selected by the GS pin (Section 4.2). F CL 1 2 π Z in C in ⋅⋅ ⋅ -------------------------------------------- = C in 1 2 π Z in F CL ⋅⋅ ⋅ ---------------------------------------------- = F CLmax 1.103 F CL ⋅ = F CLmin 0.915 F CL ⋅ = |
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