ADA4304-2

Rev. 0 | Page 9 of 12

APPLICATIONS

The ADA4304-2 active splitter is primarily intended for use in

the downstream path of television set-top boxes (STBs) that

contain multiple tuners. It is typically located directly after the

diplexer in a bidirectional CATV customer premise unit. The

ADA4304-2 provides a single-ended input and two single-

ended outputs that allow the delivery of the RF signal to two

different signal paths. These paths can include, but are not

limited to, a main picture tuner, the picture-in-picture (PIP)

tuner, an out-of-band (OOB) tuner, a digital video recorder

(DVR), and a cable modem (CM).

The ADA4304-2 exhibits composite second order (CSO) and

composite triple beat (CTB) products that are −62 dBc and

−72 dBc, respectively. The use of the SiGe bipolar process also

allows the ADA4304-2 to achieve a noise figure (NF) of 4 dB.

CIRCUIT DESCRIPTION

The ADA4304-2 consists of a low noise buffer amplifier followed

by a resistive power divider. This arrangement provides 2.8 dB

of gain relative to the RF signal present at the input of the device.

The input and each output must be properly matched to a 75 Ω

environment for distortion and noise performance to match the

data sheet specifications. AC coupling capacitors of 0.01 μF are

recommended for the input and outputs.

A 1 μH RF choke (Coilcraft chip inductor 0805LS-102X) is

required to correctly bias internal nodes of the ADA4304-2. It

should be connected between the 5 V supply and the IL pin

(Pin 14). The choke should be placed as close as possible to

the ADA4304-2 to minimize parasitic capacitance on the

IL pin, which is critical for achieving the specified bandwidth

and flatness.

EVALUATION BOARDS

The ADA4304-2 evaluation board allows designers to assess the

performance of the parts in their particular application. The

board includes 75 Ω coaxial connectors and 75 Ω controlled-

impedance signal traces that carry the input and output signals.

Power (5 V) is applied to the red VCC loop connector, and

ground is connected to the black GND loop connector. Figure 20 is

a schematic of the ADA4304-2 evaluation board. On the

ADA4304-2 evaluation board, connectors VO1 and VO4 are

not populated.

RF LAYOUT CONSIDERATIONS

Appropriate impedance matching techniques are mandatory

when designing circuit boards for the ADA4304-2. Improper

characteristic impedances on traces can cause reflections that

can lead to poor linearity. The characteristic impedance of the

signal trace to the input and from each output should be 75 Ω.

Any ground metal on the top surface near signal lines should be

stitched with vias to the internal ground plane, as shown in

Figure 21.

POWER SUPPLY

The 5 V supply should be applied to each of the VCC pins and

RF choke via a low impedance power bus. The power bus should

be decoupled to ground using a 10 μF tantalum capacitor and a

0.1 μF ceramic chip capacitor located close to the ADA4304-2. In

addition, the VCC pins should be decoupled to ground with a

0.1 μF ceramic chip capacitor located as close to each of the pins

as possible.

ADA4304-2

L1

1.0μH

GND

VCC

VO3

VIN

NC = NO CONNECT

C2

0.01μF

C4

0.01μF

VO2

C3

0.01μF

C5

10µF

+

C1

0.1µF

C8

0.1µF

1

VCC

2

VCC

3

GND

4

VIN

11

GND

12

VOUT1

10

VOUT2

9

GND

5

6

7 8

15

16

14 13

Figure 20. Evaluation Board Schematic