16-bit Microcontroller HCS12H Family, Rev. 11.1

2

Freescale Semiconductor

PRELIMINARY

Feature Detail

Feature Detail

NOTE

Not all features listed here are available in all configurations. For a quick

overview refer to Table 1.

•

HCS12 Core

– HCS12 16-bit CPU

• Upward compatible with M68HC11 instruction set

• Interrupt stacking and programmer’s model identical to M68HC11

• Instruction queue

• Enhanced indexed addressing

– HCS12 MEBI (Multiplexed Expanded Bus Interface)

– HCS12 MMC (Module Mapping Control)

– HCS12 INT (Interrupt Control)

– HCS12 BKP (On-chip Breakpoints)

– HCS12 BDM (Single-wire Background Debug™ Mode)

•

Memory options

– 32K, 64K, 128K, 256K byte Flash EEPROM or 64K, 128K, 192K and 256K byte ROM

– 2K, 4K, 6K, 8K, 12K byte RAM

– 2K, 4K byte EEPROM on Flash versions only

•

8-bit and 4-bit ports with Interrupt capability

– Digital filtering

– Programmable rising or falling edge trigger

•

Clock Reset Generator (CRG)

– Low current Colpitts or Pierce oscillator (0.5 to 16Mhz reference clock)

– Phase-locked loop clock frequency multiplier

– Windowed COP watchdog and Clock Monitor resets

– Real Time Interrupt

•

Up to 16-channels Analog-to-Digital Converter (ADC)

– 10-bit resolution

– External conversion trigger capability

•

Up to two 1M bit per second, CAN 2.0 A, B software compatible modules (MSCAN12)

– Five receive and three transmit buffers

– Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit

– Four separate interrupt channels for Rx, Tx, error and wake-up

– Low-pass filter wake-up function

– Loop-back for self test operation

•

Timer (TIM)

– 16-bit main counter with 7-bit prescaler

– Eight programmable input capture or output compare channels

– Two 8-bit or one 16-bit pulse accumulators

•

Up to six Pulse Width Modulator (PWM) channels