STA543SA

5 General structure

CD00061065

19/23

Figure 14.

5.9

PCB-Layout Grounding (general rules)

The device has 2 distinct ground leads, P-GND (POWER GROUND) and S-GND (SIGNAL

GROUND) which are practically disconnected from each other at chip level. Proper operation

requires that P-GND and S-GND leads be connected together on the PCB-layout by means of

reasonably low-resistance tracks.

As for the PCB-ground configuration, a star-like arrangement whose center is represented by

the supply-filtering electrolytic capacitor ground is highly advisable. In such context, at least 2

separate paths have to be provided, one for P-GND and one for S-GND.

The correct ground assignments are as follows:

–

STANDBY CAPACITOR, pin 9 (or any other standby driving networks): on S-GND

–

SVR CAPACITOR (pin 8): on S-GND and to be placed as close as possible to the

device.

–

INPUT SIGNAL GROUND (from active/passive signal processor stages): on S-GND.

–

SUPPLY FILTERING CAPACITORS (pins 3,17): on P-GND. The (-) terminal of the

electrolytic capacitor has to be directly tied to the battery (-) line and this should

represent the starting point for all the ground paths.