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LR4102 数据表(PDF) 21 Page - LSI Computer Systems |
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LR4102 数据表(HTML) 21 Page - LSI Computer Systems |
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21 / 32 page ![]() TinyRISC LR4102 Microprocessor 21 Table 11 AC Output Timing with respect to rising edge of PBCLKP1 Output Signal1 Min Max Units CBEN[3:0] 1.0 8.0 ns CWAITIP2 2.8 8.8 ns DEBUGMP 3.1 9.3 ns DEVSELN 0.8 7.2 ns FADDRP[28:0]2 1.3 6.2 ns FADP[31:0]3 0.8 7.4 ns FALEP 1.6 6.1 ns FRAMEN 1.0 7.5 ns GNTN 2.3 7.0 ns GP[5:0]2 0.4 7.0 ns GPIO[3:0]2 0.3 6.8 ns GPRDN2 1.7 5.8 ns GPWEN[3:0]2 1.4 6.2 ns IRDYN 1.0 7.5 ns RESET_OUTN2 2.1 7.3 ns SD_CASN[3:0]_DMP[3:0]2 1.3 6.0 ns SD_OEN_CASN2 1.4 5.9 ns SDONEP 1.8 6.4 ns SD_RASN[1:0]_CSN[1:0]2 1.3 5.9 ns SD_WEN_WEN2 1.4 5.7 ns STOPN 0.8 7.2 ns T0_OUTN2 2.6 8.8 ns (Sheet 1 of 2) |
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