Philips Semiconductors Programmable Logic Devices

Product specification

PLUS153B/D

Programmable logic arrays

(18

× 42 × 10)

October 22, 1993

10

LOGIC DIAGRAM

NOTES:

1. All programmed ‘AND’ gate locations are pulled to logic “1”.

2. All programmed ‘OR’ gate locations are pulled to logic “0”.

3.

Programmable connection.

(LOGIC TERMS–P)

(CONTROL TERMS)

1

2

3

4

5

6

7

8

9

11

12

13

14

15

16

17

18

19

I0

I1

I2

I3

I4

I5

I6

I7

B9

B8

B7

B6

B5

B4

B3

B2

B1

B0

31

24 23

16 15

8 7

0

D9D8 D7 D6 D5 D4 D3 D2 D1 D0

S9

S8

S7

S6

S5

S4

S3

S2

S1

S0

X9

X8

X7

X6

X5

X4

X3

X2

X1

X0

B9

B8

B7

B6

B5

B4

B3

B2

B1

B0