 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
MPC885ZP80 数据表(PDF) 70 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC885ZP80 数据表(HTML) 70 Page - Freescale Semiconductor, Inc |
|
|
70 / 92 page  MPC885/MPC880 Hardware Specifications, Rev. 3 70 Freescale Semiconductor UTOPIA AC Electrical Specifications Figure 70 shows signal timings during UTOPIA receive operations. Figure 70. UTOPIA Receive Timing Table 32. UTOPIA Slave (Split Bus Mode) Electrical Specifications Num Signal Characteristic Direction Min Max Unit U1 UtpClk rise/fall time (external clock option) Input 4 ns ns Duty cycle 40 60 % Frequency 33 MHz U2 UTPB, SOC, Rxclav and Txclav active delay Output 2 ns 16 ns ns U3 UTPB_AUX, SOC_Aux, RxEnb, TxEnb, RxAddr, and TxAddr setup time Input 4 ns ns U4 UTPB_AUX, SOC_Aux, RxEnb, TxEnb, RxAddr, and TxAddr hold time Input 1 ns ns UtpClk UTPB RxEnb U1 3 2 SOC 4 RxClav PHREQn 3 4 High-Z at MPHY High-Z at MPHY U1 U2 U3 U4 U4 U3 U2 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
