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MPC8250 数据表(PDF) 21 Page - Freescale Semiconductor, Inc |
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MPC8250 数据表(HTML) 21 Page - Freescale Semiconductor, Inc |
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21 / 60 page  MPC8250 Hardware Specifications, Rev. 1 Freescale Semiconductor 21 Clock Configuration Modes Table 14 describes all possible clock configurations when using the hard reset configuration sequence. Note also that basic modes are shown in boldface type. The frequencies listed are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s device. 100 66 MHz 2 133 MHz 2.5 166 MHz 101 66 MHz 2 133 MHz 3 200 MHz 110 66 MHz 2.5 166 MHz 2.5 166 MHz 111 66 MHz 2.5 166 MHz 3 200 MHz Table 14. Clock Configuration Modes 1 MODCK_H–MODCK[1–3] Input Clock Frequency2,3 CPM Multiplication Factor2 CPM Frequency2 Core Multiplication Factor2 Core Frequency2 0001_000 33 MHz 2 66 MHz 4 133 MHz 0001_001 33 MHz 2 66 MHz 5 166 MHz 0001_010 33 MHz 2 66 MHz 6 200 MHz 0001_011 33 MHz 2 66 MHz 7 233 MHz 0001_100 33 MHz 2 66 MHz 8 266 MHz 0001_101 33 MHz 3 100 MHz 4 133 MHz 0001_110 33 MHz 3 100 MHz 5 166 MHz 0001_111 33 MHz 3 100 MHz 6 200 MHz 0010_000 33 MHz 3 100 MHz 7 233 MHz 0010_001 33 MHz 3 100 MHz 8 266 MHz 0010_010 33 MHz 4 133 MHz 4 133 MHz 0010_011 33 MHz 4 133 MHz 5 166 MHz 0010_100 33 MHz 4 133 MHz 6 200 MHz 0010_101 33 MHz 4 133 MHz 7 233 MHz 0010_110 33 MHz 4 133 MHz 8 266 MHz 0010_111 33 MHz 5 166 MHz 4 133 MHz 0011_000 33 MHz 5 166 MHz 5 166 MHz 0011_001 33 MHz 5 166 MHz 6 200 MHz 0011_010 33 MHz 5 166 MHz 7 233 MHz 0011_011 33 MHz 5 166 MHz 8 266 MHz Table 13. Clock Default Configurations MODCK[1–3] Input Clock Frequency CPM Multiplication Factor CPM Frequency Core Multiplication Factor Core Frequency |
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