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MPC8271VRP 数据表(PDF) 41 Page - Freescale Semiconductor, Inc |
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MPC8271VRP 数据表(HTML) 41 Page - Freescale Semiconductor, Inc |
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41 / 60 page ![]() MPC8272 PowerQUICC II™ Family Hardware Specifications, Rev. 1.5 Freescale Semiconductor 41 Pinout 8 Pinout The figure and table below show the pin assignments and pinout for the 516 PBGA package. Figure 12 shows the pinout of the 516 PBGA package as viewed from the top surface. 1 The “low” values are the minimum allowable frequencies for a given clock mode. The minimum bus frequency in a table entry guarantees only the required minimum CPU operating frequency. The “high” values are for the purpose of illustration only. Users must select a mode and input bus frequency so that the resulting configuration does not exceed the frequency rating of the user’s device. The minimum CPU frequency is 150 MHz for commercial temperature devices and 175 MHz for extended temperature devices. The minimum CPM frequency is 120 MHz. 2 PCI_MODCK determines the PCI clock frequency range. Refer to Table 18 for higher range configurations. 3 MODCK_H = hard reset configuration word [28–31] (refer to Section 5.4 in the MPC8260 User’s Manual). MODCK[1-3] = three hardware configuration pins. 4 CPM multiplication factor = CPM clock/bus clock 5 CPU multiplication factor = Core PLL multiplication factor |
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