- 7 -
© Andigilog, Inc. 2005
www.andigilog.com
April 2006 - 70A03204
aTS75
Temperature Register
The Temperature Register is a two-byte (16-bit) read-only
register. Digital temperatures from the T-to-D converter are
stored in the Temperature Register in two’s complement
format, and the contents of this register are updated at
regular intervals—i.e., each time the T-to-D conversion is
finished.
The user can read data from the Temperature Register at
any time. When a T-to-D conversion is completed, the new
data is loaded into a comparator buffer to evaluate fault
conditions, and will update to the Temperature Register if a
read cycle is not ongoing. The aTS75 is continuously
evaluating fault conditions regardless of read or write
activity on the bus. If a read is ongoing, the previous
temperature will be read. The readable temperature will be
updated upon the completion of the next T-to-D conversion
that is not masked by a read cycle.
The Temperature Register is illustrated in Figure 4.
Depending on the resolution of the T-to-D conversion, the
9, 10, 11 or 12 LSB's of the register will contain
temperature data.
All unused bits following the digital
temperature will be zero.
The MSB position of the
Temperature Register always contains the sign bit for the
digital temperature and bit 14 contains the temperature
MSB. All bits in the Temperature Register default to zero at
power-up.
Figure 4. Temperature Register Format
Configuration Register
The Configuration Register is a one-byte (8-bit) read/write
register (see Figure 5).
This register allows the user to
control the aTS75 Shutdown Mode as well as the following
thermal alarm features: polarity, operating mode, and fault
tolerance. The Configuration Register contains two bits that
set the fault tolerance trip point. The fault tolerance trip
point is the number of consecutive times the internal circuit
reads the temperature and finds the temperature outside of
the limits programmed. The programmed limits are defined
by the TOS Register for the upper limit, and by the THYST
Register for the lower limit. Table 4 shows the relationship
between F1 and F0 and the number of consecutive errors
or "trips" needed to activate the alarm. The Configuration
Register also contains two bits that set the T-to-D
conversion resolution to 9-, 10-, 11-, or 12-bits. Table 3
shows the relationship between R1 and R0 and the
conversion resolution. All bits in the Configuration Register
default to zero at power-up.
R1 = Resolution bit 1. (See Table 3)
R0 = Resolution bit 0 . (See Table 3)
F1 = Fault tolerance bit 1. (See Table 4)
F0 = Fault tolerance bit 0 . (See Table 4)
POL = O.S. output polarity. 0 = active low, 1 = active high.
CMP/INT = Thermostat mode.
0 = Comparator Mode, 1 = Interrupt Mode.
SD = Shutdown. 0 = normal operation. 1 = Shutdown Mode
LSB
X
R1
R0
MSB
F1
F0
POL
CMP/
INT
SD
Figure 5. Configuration Register Format
SB = Two’s complement sign bit
TMSB = Temperature MSB
T = Temperature data
9-bit LSB = Temperature LSB for 9-bit conversions
10-bit LSB = Temperature LSB for 10-bit conversions
11-bit LSB = Temperature LSB for 11-bit conversions
12-bit LSB = Temperature LSB bit for 12-bit conversions
LSB
9-bit
LSB
10-bit
LSB
11-bit
LSB
12-bit
LSB
0
0
0
0
MSB
SB TMSB
T
T
T
T
T
T
10
9
8
14
13
12
11
7
6
5
4
3
2
1
Table 3. Conversion Resolution Settings
A-to-D Conversion
Resolution
R1
R0
9 Bits
0
0
10 Bits
0
1
11 Bits
1
0
12 Bits
1
1
Table 4. Fault Tolerance Settings
Fault
Tolerance
F1
F0
1
0
0
2
0
1
4
1
0
6
1
1
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
