MP1530 – TRIPLE OUTPUT STEP-UP PLUS LINEAR REGULATORS FOR TFT BIAS

MP1530 Rev. 1.4

www.MonolithicPower.com

8

5/19/2006

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OPERATION

The MP1530 is a step-up converter with two

integrated linear regulators to power TFT LCD

panels. Typically the linear regulators are

powered from charge-pumps driven from the

switch node (SW). The user can set the positive

charge-pump to be a doubler, tripler, or

quadrupler to achieve the required linear

regulator input voltage for the selected output

voltage. Typically the negative charge-pump is

configured as a 1x inverter.

Step-Up Converter

The step-up, fixed-frequency, 1.4MHz converter

employs a current-mode control architecture

that maximizes loop bandwidth to provide fast-

transient responses needed for TFT LCD

drivers. High switching frequency allows for

smaller inductors and capacitors minimizing

board space and thickness.

Linear Regulators

The positive linear regulator (GH) uses a

P-Channel pass element to drop the input

voltage down to the regulated output voltage.

The feedback of the positive linear regulator is

a

conventional

error

amplifier

with

the

regulation threshold at 1.25V.

The negative linear regulator (GL) uses a

N-Channel pass element to raise the negative

input voltage up to the regulated output voltage.

The feedback threshold for the negative linear

regulator is ground. The resistor string goes

from REF (1.25V) to FB2 and from FB2 to GL to

set the negative output voltage.

The difference between the voltage at IN3 and

the voltage at IN2 is limited to 60V abs. max.

Fault Sensing and Timer

Each of the 3 outputs has an internal

comparator that monitors its respective output

voltage by measuring the voltage at its

respective FB input. When any FB input

indicates that the output voltage is below

approximately 80% of the correct regulation

pin goes high.

The fault timer uses the same CT capacitor as

the soft-start sequencer. If any fault persists to

the end of the fault timer (One CT cycle is 6ms

for a 10nF capacitor), all outputs are disabled.

Once the outputs are shut down due to the fault

timer, the MP1530 must be re-enabled by either

cycling EN or by cycling the input power.

If the fault persists for less than the fault timer

function as though no fault has occurred.

Power-On Sequencing and Soft-Start

The MP1530 automatically sequences its

outputs at startup. When EN goes from low to

high, or if EN is held high and the input voltage

IN rises above the under-voltage lockout

threshold, the outputs turn on in the following

sequence:

1. Step-up Converter

2. Negative Linear Regulator (GL)

3. Positive Linear Regulator (GH)

Each output turns on with a soft-start voltage

ramp. The soft-start ramp period is set by the

timing capacitor connected between CT and

GND. A 10nF capacitor at CT sets the soft-start

ramp period to 6ms. The timing diagram is

shown in Figure 2.

After the MP1530 is enabled, the power-on

reset spans three periods of the CT ramp. First

the step-up converter is powered up with

reference to the CT ramp and allowed one

period of the CT ramp to settle. Next the

negative linear regulator (GL) is soft-started by

ramping REF, which coincides with the CT

ramp, and also allowed one CT ramp period to

settle.