MP3213 – 700KHZ/1.3MHZ BOOST CONVERTER WITH A 3.5A SWITCH

MP3213 Rev. 1.1

www.MonolithicPower.com

8

5/12/2006

MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited.

© 2006 MPS. All Rights Reserved.

Compensation

The output of the transconductance error

amplifier (COMP) is used to compensate the

regulation control system. The system uses two

poles and one zero to stabilize the control loop.

by the compensation capacitor C3 and the

compensation

resistor

R3.

These

are

determined by the equations:

LOAD

1

P

R

C2

1

f

×

×

π

=

VEA

EA

2

P

A

C3

2

G

f

×

×

π

×

=

R3

C3

2

1

Z

×

×

π

×

=

the error amplifier voltage gain.

The DC loop gain is:

2

LOAD

OUT

FB

IN

VEA

VDC

V

V

R

V

A

5

.

1

A

×

×

×

×

=

exists in continuous conduction mode (inductor

current does not drop to zero on each cycle)

step-up converters. The frequency of the right

half plane zero is:

2

2

OUT

LOAD

IN

RHPZ

V

L

2

R

V

f

×

×

π

×

×

=

Table

1

lists

generally

recommended

compensation components for different input

voltage, output voltage and capacitance of most

frequently used output ceramic capacitors.

Ceramic capacitors have extremely low ESR,

therefore the second compensation capacitor

(from COMP to GND) is not required.

Table 1—Component Selection

(V)

(V)

C2

(µF)

R3

(kΩ)

C3

(nF)

3.3

8

4.7

10

2.2

3.3

8

10

10

2.2

3.3

8

22

10

2.2

3.3

12

4.7

15

1

3.3

12

10

15

1

3.3

12

22

15

2.2

3.3

18

4.7

20

1

3.3

18

10

20

1

3.3

18

22

30

2.2

5

8

4.7

10

4.7

5

8

10

10

4.7

5

8

22

15

1

5

12

4.7

15

2.2

5

12

10

15

2.2

5

12

22

20

1

5

18

4.7

20

1

5

18

10

20

1

5

18

22

30

1

12

15

4.7

10

2.2

12

15

10

10

2.2

12

15

22

15

1

12

18

4.7

5.1

2.2

12

18

10

5.1

2.2

12

18

22

15

1

For faster control loop and better transient

response, set the capacitor C3 to the

recommended value in Table 1. Then slowly

increase the resistor R3 and check the load

step response on a bench to make sure the

ringing and overshoot on the output voltage at

the edge of the load steps is minimal. Finally,

the compensation needs to be checked by

calculating the DC loop gain and the crossover

frequency. The crossover frequency where the

loop gain drops to 0dB or a gain of 1 can be

obtained visually by placing a –20dB/decade

slope at each pole, and a +20dB/decade slope

at each zero. The crossover frequency should

be at least one decade below the frequency of

the right-half-plane zero at maximum output

load current to obtain high enough phase

margin for stability.