3

OCT 17-06 RevB

SP705 Low Power Microprocessor Supervisory Circuits

© 2006 Sipex Corporation

R

E

T

E

M

A

R

A

P

.

N

I

M

.

P

Y

T

.

X

A

M

S

T

I

N

U

S

N

O

I

T

I

D

N

O

C

e

g

a

t

l

o

V

t

u

p

t

u

O

O

D

W

V

C

C

5

.

1

-

0

4

.

0

V

I

E

C

R

U

O

S

0

0

8

=

µA

I

K

N

I

S

A

m

2

.

3

=

R

M

t

n

e

r

r

u

C

p

U

-

ll

u

P

0

0

1

0

5

2

0

0

6

µA

R

M

V

0

=

R

M

t

,

h

t

d

i

W

e

s

l

u

P

R

M

0

5

1

s

n

R

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d

l

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h

s

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T

t

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p

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I

W

O

L

H

G

I

H

0

.

2

8

.

0

V

R

M

t

,

y

a

l

e

D

t

u

O

t

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s

e

R

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0

5

2

s

n

2

e

t

o

N

d

l

o

h

s

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r

h

T

t

u

p

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I

F

P

0

2

.

1

5

2

.

1

0

3

.

1

V

V

C

C

V

5

=

t

n

e

r

r

u

C

t

u

p

n

I

I

F

P

0

0

.

5

2

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1

0

.

0

0

0

.

5

2

A

n

O

F

P

e

g

a

t

l

o

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t

u

p

t

u

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V

C

C

5

.

1

-

4

.

0

V

I

E

C

R

U

O

S

0

0

8

=

µA

I

K

N

I

S

A

m

2

.

3

=

Note 1: The input voltage limits on PFI and MR can be exceeded if the input current is less than 10mA.

Note 2: Applies to both RESET in the SP705-SP708 and RESET in the SP707/708/813L/813M.

SPECIFICATIONS

V

SP705

SP706

SP813L

SP813M

1

8

7

6

5

4

3

2

1

MR

GND

PFI

WDO

RESET / RESET*

WDI

PFO

SP707

SP708

1

8

7

6

5

4

3

2

1

MR

GND

PFI

RESET

RESET

N.C.

PFO

SP705

SP706

SP813L

SP813M

1

8

7

6

5

4

3

2

1

WDO

MR

WDI

PFO

PFI

GND

SP707

SP708

1

8

7

6

5

4

3

2

1

RESET

RESET

MR

N.C.

PFO

PFI

GND

RESET / RESET*

DIP and SOIC

µSOIC

Figure 1. Pinouts

* SP813L/M only

* SP813L/M only