Date: 4/18/05

SP691A/693A/800L/800M Low Power Microprocessor Supervisor with Battery Switch-Over © Copyright 2005 Sipex Corporation

12

Watchdog Function

The watchdog monitors

µP activity via the

Watchdog Input (WDI). If the

µP becomes

inactive, RESET and RESET are asserted.

To use the watchdog function, connect WDI to

a bus line or

µP I/O line. If WDI remains high

or low for longer than the watchdog timeout pe-

riod (1.6s nominal). WDO, RESET, and RESET

are asserted, indicating a software fault or idle

conditions. Refer to RESET and RESET

Outputs and Watchdog Output sections.

Watchdog Input

A change of logic state (minimum 100ns

duration) at WDI during the watchdog period

will reset the watchdog timer. The watchdog

default timout is 1.6sec.

To disable the watchdog function, leave WDI

floating. An internal resistor network (100k

Ω

equivalent impedance at WDI) biases WDI to

approximately 1.6V. Internal comparators

detect this level and disable the watchdog timer.

When Vcc is below the reset threshold, the

watchdog function is disabled and WDI is

disconnected from its internal resistor network,

thus becoming high impedance.

Watchdog Output

WDO remains high if there is activity (transition

or pulse) at WDI during the watchdog-timeout

period. The watchdog function is disabled and

reset threshold or when WDI is an open circuit.

In watchdog mode, if no transition occurs at

WDI during the watchdog-timeout period,

Figure 20. Watchdog Timeout Period and Reset Active Time

Figure 21. Selecting Timeout Periods

No Connect

X

No Connect

X

7

8

No Connect

X

7

8

7

8

7

8

1.6sec Normal Watchdog Timeout

Internal Oscillator

100ms Normal Watchdog Timeout

Internal Oscillator

Normal Watchdog Timeout =

[ms]

External Oscillator

Normal Watchdog Timeout = 1024 Clock Periods

External Clock

47pF

WDI

WDO

RESET