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LT8350SAVPBF 数据表(PDF) 15 Page - Analog Devices

部件名 LT8350SAVPBF
功能描述  40VIN, 18VOUT, 6A Synchronous Buck-Boost Silent Switcher® 2
PDF  36 Pages
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制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

LT8350SAVPBF 数据表(HTML) 15 Page - Analog Devices

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Data Sheet
LT8350S
analog.com
Rev. A
15 of 36
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
PIN DESCRIPTIONS
Table 6. Pin Descriptions
PIN
NAME
DESCRIPTION
2, 3
VIN
Input Voltage Pin. The VIN pin supplies the internal circuitry and connects to the
power input of the converter. Bypass this pin to ground with a ceramic capacitor.
The bypass capacitor should be placed as close to the chip as possible with vias
directly down to the ground plane.
5
EN/UVLO
Enable and Undervoltage Lockout Pin. Force the pin below 0.3V to shut down the
chip. Force the pin above 1.235V (typical) for normal operation. If neither function
is used, connect this pin directly to VIN. See the Applications Information section for
Programming VIN UVLO.
6
INTVCC
Internal 3.6V Linear Regulator Output Pin. Powered from the VIN pin, the INTVCC
supplies the internal control circuitry and gate drivers. Do not force any voltage on
this pin. Place a 1μF bypass capacitor to GND close to the package.
7
RP
Factory Test Pin. Always connect this pin to INTVCC.
8
LOADEN
Load Switch Enable Input. The LOADEN pin controls the ON/OFF of the high-side
PMOS load switch. If the load switch control is not used, connect this pin to VREF or
INTVCC. Forcing the pin low turns off all power switches, disconnects the VC pin
from all internal loads, and turns off LOADTG.
LT8350S
TOP VIEW
(Not to Scale)
VOUT
VIN
VIN
ISMON
VREF
LOADEN
RP
INTVCC
EN/UVLO
2
31
30
29
28
27
11
12
13
14
15
16
3
5
6
7
8
9
10
32
25
24
22
21
20
19
18
17
33
GND
34
GND
35
GND
36
GND
LQFN PACKAGE
32-LEAD (6mm × 4mm × 0.94mm)
EXPOSED PAD (PINS 33, 34, 35, 36) ARE GND, MUST BE SOLDERED TO PCB
VOUT
LOADTG
EXTVCC
CLKOUT
SYNC/MODE
RT
SS



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