8

Mar -07 Rev AJ

SP7662 Wide Input Voltage Range 2A, 300kHz Buck Regulator

© 2007 Sipex Corporation

SolvingforR9weget:

R9 = [60mV • (R3 + R4)]

R9

63.4KΩ

CSP

6.8nF

SWN

ISP

ISN

SP7662

CS

0.uF

R4

5.11KΩ

R3

5.11KΩ

L=2.7uH,DCR=4.1mΩ

Over-current detection circuit for

Decreasing the Current Limit

a resistor is added as shown in the follow-

ing figure. R8increases the net voltage

detected by the current-sense comparator.

Voltage at the positive and negative terminal

ofcomparatorisgivenby:

Sincethecomparatoristriggeredat60mV:

VSP-VSN = 60 mV

Combining the above equations and solv-

ingforR8:

R8 =

R4 •

3.3V,calculatedR8is1.5MΩ.

CSP

6.8nF

ISN

SP7662

SWN

ISP

CS

0.uF

R4

5.11KΩ

R3

5.11KΩ

L=2.7uH,DCR=4.1mΩ

R8

1.5MΩ

Over-current detection circuit for

Handling of Faults

Upon the detection of power (UVLO), ther-

mal, or short-circuit faults, the SP7662 is

forced into an idle state where the SS and

COMPpinsarepulledlowandbothswitches

are held off. In the event of UVLO fault, the

SP7662 remains in this idle state until the

UVLO fault is removed. Upon the detection

of a thermal or short-circuit fault, an internal

200ms timer is activated. In the event of a

short-circuit fault, a restart is attempted im-

mediately after the 200ms timeout expires.

Whereas, when a thermal fault is detected

the200msdelaycontinuouslyrecyclesanda

restartcannotbeattempteduntilthethermal

fault is removed and the timer expires.

THEORY OF OPERATION