2

Feb2-07 Rev O

SP7663 Wide Input Voltage Range 6A, 600kHz Buck Regulator

© 2007 Sipex Corporation

SP7663 Voltage Mode Control Loop with Loop Dynamic

(SRz2Cz2+1)(SR1Cz3+1)

[S^2LC

SR1Cz2(SRz3Cz3+1)(SRz2Cp1+1)

(Volts)

(Volts)

Notes:

R

R

V

Condition:

Cz2>>Cp1&R1>>Rz3

OutputLoadResistance>>R

or

(Volts)

TypeIIIVoltageLoop

Compensation

G

PWMStage

G

Block

OutputStage

G

Block

VoltageFeedback

G

capacitor ESR and capacitance. Ignoring

the inductor ripple current, the input voltage

ripplecanbedeterminedby:

The capacitor type suitable for the output

capacitors can also be used for the input

capacitors. However, exercise extra caution

whentantalumcapacitorsareused.Tantalum

capacitors are known for catastrophic failure

when exposed to surge current, and input

capacitors are prone to such surge current

when power supplies are connected “live”

to low impedance power sources. Although

tantalum capacitors have been successfully

employed at the input, it is generally not

recommended.

Loop Compensation Design

The open loop gain of the whole system can

be divided into the gain of the error ampli-

fier,PWMmodulator,buckconverteroutput

stage, and feedback resistor divider. In order

to cross over at the desired frequency cut-off

(FCO),thegainoftheerroramplifiermust

compensate for the attenuation caused by

the rest of the loop at this frequency. The

goal of loop compensation is to manipu-

late loop frequency response such that its

crossover gain at 0db, results in a slope of

-20db/decade.

The first step of compensation design is

to pick the loop crossover frequency. High

crossover frequency is desirable for fast

transientresponse,butoftenjeopardizesthe

power supply stability. Crossover frequency

should be higher than the ESR zero but

less than /5 of the switching frequency or

APPLICATIONS INFORMATION