SZF2002 datasheet(21/76 Pages) PHILIPS

21 / 76 page

1998 Aug 26

Philips Semiconductors

Product speciﬁcation

Low voltage 8-bit microcontroller with

6-kbyte embedded RAM

SZF2002

12.4

Timer/Counter 2 Mode Register (T2MOD)

Table 8

Timer/Counter 2 Mode Register (SFR address C9H)

Description of T2MOD bits

Table 9

Timer 2 operating modes; note 1

Note

1. X = don’t care

76543210

−−

RCLK1

TCLK1

−

T2RD

T2OE

DCEN

BIT

SYMBOL

DESCRIPTION

−

These 2 bits are reserved.

−

RCLK1

Receive Clock 1 ﬂag. Reserved for future UART2. When set, causes the UART to use

Timer 2 overﬂow pulses. RCLK1 = 0, causes Timer 1 overﬂow pulses to be used.

TCLK1

Transmit Clock 1 ﬂag. Reserved for future UART2. When set, causes the UART to use

Timer 2 overﬂow pulses. TCLK1 = 0, causes Timer 1 overﬂow pulses to be used.

−

This bit is reserved.

T2RD

Timer 2 Read ﬂag. This bit is set by hardware if following a TL2 read and before a TH2

read, TH2 is incremented. It is reset on the trailing edge of the next TL2 read.

T2OE

Timer 2 Output Enable. When set, output is activated to output a clock at the T2 pin

(Clock output mode).

DCEN

Down Count Enable. When set, this allows Timer 2 to be conﬁgured as an up/down

counter.

RCLK0 + TCLK0 + RCLK1 + TCLK1

CP/RL2

T2OE

C/T2

MODE

16-bit Auto-reload

16-bit Capture

Baud Rate Generator

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