ADL5523

Preliminary Technical Data

Rev. Pr

A | Page 4 of 6

PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS

INP

1

2

3

45

6

7

8

OUT

NC

NC

VBIAS

NC

NC

VDD

ADL5523

top view

(not to scale)

Exposed pad

Figure 2. 8-Lead LFCSP

Table 3. Pin Function Descriptions- 8 Lead CSP

Pin No.

Mnemonic

Description

1

VBIAS

Bias: Internal DC bias

2

INP

RF Input: Must be AC-coupled.

3,4,5,6

NC

NC: No internal connection

7

OUT

RF Output: Must be AC-coupled.

8

VDD

Supply: VDD bias needs to be bypassed to ground using

low-inductance capacitors.

Exposed pad

EP

Exposed Paddle: Connect to a low impedance ground plane