Low-Power Programmable Quick Turn Clock

T M

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 12/12/06 Page 2

KEY PROGRAMMING PARAMETERS

CLK

Output Frequency

Output Drive Strength

Programmable

Input/Output

Where M = 11 bit

R = 8 bit

P = 5 bit

Three optional drive strengths to

choose from:

• Low: 4mA

• Std: 8mA (default)

• High: 16mA

One output pin can be configured

as:

• OE - input

• CLK1 – output

PACKAGE PIN ASSIGNMENT

Pin Assignment

Name

SOT

Pin #

SC70

Pin#

DFN

Pin#

Type

Description

OE, CLK1

1

4

2

B

This programmable I/O pin can be configured as an Output

Enable (OE) input, or CLK1 output. This pin has an internal

60K

pull up resistor ( OE Function Only ).

GND

2

2, 5

3

P

GND connection

XIN, FIN

3

6

1

I

Crystal or Reference input pin

Crystal Output pin

XOUT

4

-

6

O

Do Not Connect (DNC ) when FIN is present

VDD

5

1

5

P

VDD connection

CLK0

6

3

4

O

Programmable Clock Output