1.8V-3.3V PicoPLL

47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991 www.phaselink.com Rev 3/9/07 Page 1

FEATURES

• Designed for Very Low-Power applications

o

6-pin DFN (2.0mmx1.3mmx0.6mm)

o

6-pin SC70 (2.3mmx2.25mmx1.0mm)

o

6-pin SOT23 (3.0mmx3.0mmx1.35mm)

• Input Frequency:

o

Fundamental Crystal: 10MHz to 50MHz

o

Reference Input: 1MHz to 200MHz

• Accepts >0.1V reference signal input voltage

• Output Frequency:

o

<65MHz @ 1.8V operation

o

<90MHz @ 2.5V operation

o

<125MHz @ 3.3V operation

• Disabled outputs programmable as HiZ or Active Low.

• Low current consumption:

o

<1.2mA @ 27MHz

o

< 5 A when PDB is activated

• Single 1.8V, 2.5V, or 3.3V ± 10% power supply

• Operating temperature range from -40°C to 85°C

DESCRIPTION

The PL611s-28 consumes very low-power while

producing high performance clock outputs of up to

55MHz. Designed for low-power applications with

very stringent space requirement, PL611s-28

consumes about 1.2mA, while producing 2 distinct

outputs of 27MHz and 13.5MHz. Designed to fit in a

small SOT, SC70, or SOT23 package for high

performance applications, the PL611s-28 offers

excellent phase noise and jitter performance. The

power down feature of PL611s-28, when activated,

allows the IC to consume less than 5 A of power,

while its programming flexibility allows generating

any output, using a low-cost crystal or reference

input. In addition, one programmable I/O pin can be

configured as Output Enable (OE), Frequency

switching (FSEL), Power Down (PDB) input, or CLK1

PACKAGE PIN CONFIGURATION

BLOCK DIAGRAM

Phase

Detector

Charge

Pump

Loop

Filter

VCO

XIN/FIN

XOUT

R-counter

(8-Bit)

Fvco=Fref* (2 * M /R)

Fout=Fvco / (2 *P)

CLK0

Programming

Logic

OE, FSEL,

PDB, CLK1

XTAL

OSC

(11-Bit)

(5-Bit)

M-counter

P-counter

Programmable

CLoad

Programmable Function

1

2

3

4

5

6

OE, PDB,

FSEL, CLK1

GND

XIN/FIN

VDD

XOUT

CLK0

DFN

DFN

DFN

DFN----6

6

6

6L

L

L

L

((((2

2

2

2....0

0

0

0mmx

mmx

mmx

mmx1

1

1

1....3

3

3

3mmx

mmx

mmx

mmx0

0

0

0....6

6

6

6mm

mm

mm

mm))))

SOT

SOT

SOT

SOT23

23

23

23----6

6

6

6L

L

L

L

((((3

3

3

3....0

0

0

0mmx

mmx

mmx

mmx3

3

3

3....0

0

0

0mmx

mmx

mmx

mmx1

1

1

1....35

35

35

35mm

mm

mm

mm))))

1

2

3

4

5

6

VDD

GND

CLK0

SC

SC

SC

SC70

70

70

70----6

6

6

6L

L

L

L

((((2

2

2

2....3

3

3

3mmx

mmx

mmx

mmx2

2

2

2....25

25

25

25mmx

mmx

mmx

mmx1

1

1

1....0

0

0

0mm

mm

mm

mm))))

XIN/FIN

OE, PDB,

FSEL, CLK1

XIN/FIN

GND

XOUT

VDD

CLK0

OE, PDB, FSEL, CLK1

1

2

3

6

5

4

XOUT