Data Sheet

ADRF5162

High Power, 100 W Peak, Silicon SPDT, Reflective Switch, 0.4 GHz to 8 GHz

Rev. 0

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FEATURES

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Frequency range: 0.4 GHz to 8 GHz

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Low insertion loss: 0.6 dB typical to 4 GHz

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High Isolation: 45 dB typical to 4 GHz

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High input linearity

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0.1 dB power compression (P0.1dB): 50 dBm

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Third order intercept (IP3): >76 dBm

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High power handling at TCASE = 85°C:

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Insertion loss path

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Average: 45.5 dBm

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Pulsed (>100 ns pulse width, 15% duty cycle): 48.5 dBm

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Peak (≤100 ns peak duration, 5% duty cycle): 50 dBm

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Hot-switching at RFC: 43 dBm

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0.1 dB RF settling time with PIN ≤ 43 dBm: 1.2 μs

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No low frequency spurious

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Positive control interface: CMOS/LVTTL-compatible

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24-lead, 4.0 mm × 4.0 mm LFCSP package

APPLICATIONS

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Military radios, radars, and electronic counter measures

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Cellular infrastructure

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Test and instrumentation

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GaN and PIN diode replacement

FUNCTIONAL BLOCK DIAGRAM

Figure 1. Functional Block Diagram

GENERAL DESCRIPTION

The ADRF5162 is a reflective, single pole double-throw (SPDT)

switch manufactured in the silicon process.

The ADRF5162 operates from 0.4 GHz to 8 GHz with typical inser-

tion loss of 0.6 dB and typical isolation of 45 dB. The device has

a radio frequency (RF) input power handling capability of 45.5 dBm

average power and 50 dBm peak power for the insertion loss path.

The ADRF5162 draws a low current of 130 μA on the positive sup-

ply of +3.3 V and 500 μA on negative supply of −3.3 V. The device

employs complementary metal-oxide semiconductor (CMOS)-/low-

voltage transistor to transistor logic (LVTTL)-compatible controls.

The ADRF5162 requires no additional driver circuitry, which makes

it an ideal alternative to GaN and PIN diode-based switches.

The ADRF5162 comes in a 24-lead, 4.0 mm × 4.0 mm, RoHS-com-

pliant, lead frame chip scale package (LFCSP) package and can

operate from −40°C to +105°C.