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M65KA512AB 数据表(PDF) 14 Page - STMicroelectronics |
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M65KA512AB 数据表(HTML) 14 Page - STMicroelectronics |
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14 / 55 page ![]() Operations M65KA512AB 14/55 3.7 Deep Power-Down The purpose of this mode is to achieve maximum power reduction by cutting the power supply to the whole memory array. Data is no longer retained when the device enters Deep Power-Down Mode. All banks must be precharged before entering Deep Power-Down mode. The M65KA512ABM65KA512AB enters Deep Power Down Mode by holding E and W Low with RAS and CAS High at the rising edge of the clock, K, while driving KE Low (see Figure 26: Deep Power-Down Entry ac waveforms). The M65KA512AB exits Deep Power-Down mode by asserting KE High. A special sequence is then required before the device can take any new command into account: 1. Maintain No Operation status conditions for a minimum of 200µs, 2. Issue a Precharge command to all banks of the device (see Section 4.6: Precharge command for details), 3. Issue a Mode Register Set command to initialize the Mode Register bits, 4. Issue an Extended Mode Register Set command to initialize the Extended Mode Register bits, 5. Issue 2 or more Auto Refresh commands. The Deep Power-Down mode exit sequence is illustrated in Figure 27: Deep Power-Down Exit ac waveforms. Note: The 2 Auto Refresh commands can be issued either after or before the configuration of the Mode and Extended Mode Registers. |
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