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24FC65T-/P 数据表(PDF) 8 Page - Microchip Technology

部件名 24FC65T-/P
功能描述  64K 5.0V 1 MHz I2C??Smart Serial??EEPROM
PDF  14 Pages
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制造商  MICROCHIP [Microchip Technology]
网页  http://www.microchip.com
标志 MICROCHIP - Microchip Technology

24FC65T-/P 数据表(HTML) 8 Page - Microchip Technology

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24FC65
DS21125E-page 8
 2004 Microchip Technology Inc.
byte would be 10XX0011. After the third byte is sent to
the device, it will acknowledge and a STOP bit is then
sent by the master to complete the command.
During a normal write sequence, if an attempt is made
to write to a protected address, no data will be written
and the device will not report an error or abort the
command. If a write command is attempted across a
secure boundary, unprotected addresses will be written
and protected addresses will not.
5.8
Security Configuration Read
The status of the secure portion of memory can be read
by using the same technique as programming this
option except the READ bit (bit 6) of the configuration
byte is set to a one. After the configuration byte is sent,
the device will acknowledge and then send two bytes of
data to the master just as in a normal read sequence.
The master must acknowledge the first byte and not
acknowledge the second, and then send a stop bit to
end the sequence. The upper four bits of both of these
bytes will always be read as '1's. The lower four bits of
the first byte contains the starting secure block. The
lower four bits of the second byte contains the number
of secure blocks. The default starting secure block is
fifteen and the default number of secure blocks is zero
(Figure 8-1).
6.0
ACKNOWLEDGE POLLING
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the STOP for a write command has
been issued from the master, the device initiates the
internally timed write cycle. ACK polling can be initiated
immediately. This involves the master sending a
START followed by the control byte for a write
command (R/W = 0). If the device is still busy with the
write cycle, then no ACK will be returned. If the cycle is
complete, then the device will return the ACK and the
master can then proceed with the next read or write
command. See Figure 6-1 for flow diagram.
FIGURE 6-1:
ACKNOWLEDGE POLLING
FLOW
Did Device
Acknowledge
(ACK = 0)?
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Next
Operation
No
Yes



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