 2004 Microchip Technology Inc.

DS21170E-page 5

24C01SC/24C02SC

3.6

Slave Address

After generating a Start condition, the bus master trans-

mits the slave address consisting of a 4-bit device code

(1010) for the 24C01SC/02SC, followed by three “don't

care” bits.

The eighth bit of slave address determines if the master

device wants to read or write to the 24C01SC/02SC

(Figure 3-2).

The 24C01SC/02SC monitors the bus for its corre-

sponding slave address all the time. It generates an

Acknowledge bit if the slave address was true, and it is

not in a programming mode.

FIGURE 3-2:

CONTROL BYTE

ALLOCATION

4.0

WRITE OPERATION

4.1

Byte Write

Following the Start signal from the master, the device

code (4 bits), the “don't care” bits (3 bits), and the R/W

bit, which is a logic low, is placed onto the bus by the

master transmitter. This indicates to the addressed

slave receiver that a byte with a word address will

follow after it has generated an Acknowledge bit during

the ninth clock cycle. Therefore, the next byte transmit-

ted by the master is the word address and will be

written into the address pointer of the 24C01SC/02SC.

After receiving another Acknowledge signal from the

24C01SC/02SC, the master device will transmit the

data word to be written into the addressed memory

location. The 24C01SC/02SC acknowledges again

and the master generates a Stop condition. This

initiates the internal write cycle, and during this time the

24C01SC/02SC will not generate Acknowledge signals

(Figure 4-1).

4.2

Page Write

The write control byte, word address, and the first data

byte are transmitted to the 24C01SC/02SC in the same

way as in a byte write. But instead of generating a Stop

condition, the master transmits up to eight data bytes to

the 24C01SC/02SC, which are temporarily stored in

the on-chip page buffer and will be written into the

memory after the master has transmitted a Stop condi-

tion. After the receipt of each word, the three lower

order address pointer bits are internally incremented by

one. The higher order five bits of the word address

remains constant. If the master should transmit more

than eight words prior to generating the Stop condition,

the address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received an

internal write cycle will begin (Figure 4-2).

Operation

Control

Code

Chip

Select

R/W

Read

1010

xxx

1

Write

1010

xxx

0

X = don’t care

R/W

A

10

1

0

x

x

x

Read/Write

Start

SLAVE ADDRESS

Note:

Page write operations are limited to writing

bytes within a single physical page,

regardless of the number of bytes actually

being written. Physical page boundaries

start at addresses that are integer multi-

ples of the page buffer size (or ‘page size’)

and end at addresses that are integer

multiples of [page size - 1]. If a page Write

command attempts to write across a

physical page boundary, the result is that

the data wraps around to the beginning of

the

current

page

(overwriting

data

previously stored there), instead of being

written to the next page as might be

expected. It is therefore necessary for the

application software to prevent page write

operations that would attempt to cross a

page boundary.