24LC00-SLASHST datasheet(6/22 Pages) MICROCHIP

6 / 22 page

24LCS61/24LCS62

DS21226E-page 6

 2004 Microchip Technology Inc.

4.0

FUNCTIONAL DESCRIPTION

The 24LCS61/62 supports a bidirectional 2-wire bus

and data transmission protocol compatible with the I2C

protocol. The device is configured to reside on a

common I2C bus with up to 255 total 24LCS61/62

devices on the bus. Each device has a unique serial

number assigned to it when delivered from the factory.

In an actual system, this serial number will be used to

assign a separate 8-bit ID byte to each device in the

system. After an ID byte is assigned to each device in

the system, standard Read and Write commands can

be sent to each device individually.

4.1

Device Serial Number

The device serial number is stored in a 48-bit (6 byte)

number register is nonvolatile and cannot be changed

by the user. Before shipment from the factory, this

device. The 48 bit register allows for 2.8

•1014 different

combinations. The serial number is used at power-up

to assign the device an ID byte which is then used for

all standard Read and Write commands sent to that

specific device.

4.2

Device ID Byte

The Device ID byte is an 8-bit value that provides the

means for every device on the bus to be accessed

individually. The ID byte is stored in a RAM register

separate from the data array. The ID byte register will

always default to address 00 upon power-up.

4.3

Device Addressing

Each command to the device must begin with a Start

bit. A control byte is the first byte received following the

Start condition from the master device (Figure 4-1).

The control byte consists of a four-bit control code, the

OE bit, and three command select bits. For the

24LCS61/62, the control code is set to ‘0110’ binary for

all operations. The device will not acknowledge any

commands sent with any other control code. The next

bit is the Output Enable (OE) bit. This bit controls the

operation of the EDS pin. See Section 9.0 “External

Device Select (EDS) Pin and Output Enable (OE)

Bit” for more details. The last three bits of the control

byte are the command select bits (C0-C2). The

command select bits determine which command will be

executed. See Table 4-1. Following a valid control byte,

the 24LCS61/62 will acknowledge the command.

FIGURE 4-1:

CONTROL BYTE FORMAT

TABLE 4-1:

COMMAND CODES

Command

Command Select Bits

(C2 C1 C0)

Set Write Protection Fuse

000

Read

001

Write (Byte or Page)

010

Assign Address

100

Clear Address

110

SACK

Control Code

Command Select

Bits

Acknowledge Bit

Start Bit

Output Enable

Bit

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