SMC032BFY6 datasheet(19/91 Pages) STMICROELECTRONICS

19 / 91 page

SMCxxxBF

Electrical interface

19/91

–CD1, –CD2

(PC Card Memory Mode)

26,25

These are connected to ground on the Card. They are used

by the host to determine that the Card is fully inserted into

its socket.

–CD1, –CD2

(PC Card I/O Mode)

Same for all modes.

–CD1, –CD2

(True IDE Mode)

Same for all modes.

–CE1, –CE2

(PC Card Memory Mode)

I7,32

Used to select the Card and to indicate whether a Byte or a

Word operation is being performed. –CE2 accesses the odd

Byte, –CE1 accesses the even Byte or the odd Byte

depending on A0 and –CE2. A multiplexing scheme based

on A0, –CE1, –CE2 allows 8 bit hosts to access all data on

D0 to D7.

–CE1, –CE2

(PC Card I/O Mode)

Same as PC Card Memory Mode.

–CS0, –CS1

(True IDE Mode)

–CS0 is the chip select for the task file registers, while –CS1

selects the Alternate Status Register and the Device

Control Register.

When –DMACK is asserted, -CS0 and –CS1 must be de-

asserted and data width is 16 bits.

–CSEL

(PC Card Memory Mode)

Not used.

–CSEL

(PC Card I/O Mode)

Not used.

–CSEL

(True IDE Mode)

This internally pulled up signal is used to configure the Card

as a Master or Slave. When grounded it is configured as a

Master, when open it is configured as a Slave.

–IOWR

(PC Card Memory Mode)

I35

Not used.

–IOWR

(PC Card I/O Mode)

The I/O Write strobe pulse is used to clock I/O data on the

bus into the Card controller registers. Clocking occurs on

the rising edge.

–IOWR

(True IDE Mode)

Same as PC Card I/O Mode.

–OE

(PC Card Memory Mode)

This is an Output Enable strobe generated by the host

interface. It reads data and the CIS and configuration

registers.

–OE

(PC Card I/O Mode)

Reads the CIS and configuration registers.

–ATASEL

(True IDE Mode)

This input signal must be driven Low to enable True IDE

mode.

Table 9.

Signal Description (continued)

Signal Name

Dir.

Description

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