MSC7119 datasheet(49/56 Pages) FREESCALE

部件名	MSC7119

功能描述	Low-Cost 16-bit DSP with DDR Controller and 10/100 Mbps Ethernet MAC

PDF	56 Pages

Scroll/Zoom	100%

制造商	FREESCALE [Freescale Semiconductor, Inc]

网页	http://www.freescale.com

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Hardware Design Considerations

MSC7119 10/100 Mbps Ethernet MAC Data Sheet, Rev. 6

Freescale Semiconductor

3.5

DDR Memory System Guidelines

MSC7119 devices contain a memory controller that provides a glueless interface to external double data rate (DDR) SDRAM

memory modules with Class 2 Series Stub Termination Logic 2.5 V (SSTL_2). There are two termination techniques, as shown

in Figure 32. Technique B is the most popular termination technique.

Figure 33 illustrates the power wattage for the resistors. Typical values for the resistors are as follows:

•

RS = 22

•RT = 24

Figure 32. SSTL Termination Techniques

Controller

Address

Command

Chip Selects

Data

Strobes

Mask

VREF

VTT

Generator

DDR

Bank

DDR

Bank

VTT

SSTL_2

Controller

Address

Command

Chip Selects

Data

Strobes

Mask

VTT

Generator

DDR

Bank

DDR

Bank

SSTL_2

Technique A

Technique B

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