M66239FP

Rev.1.00 Mar 16, 2005 page 21 of 23

After Power-On Procedure

After power-on, M66239FP status is unknown. Following procedure must be done.

1. VCC power-on

2. After Vcc and input clock frequency is stable, set the FSET[2:0].

3. Reset pulse input.

Input more than MCLK 1000 clock cycle from FSET setting is completed to RESET set to "H" level.

4. Serial resister set.

5. After input MCLK clock till PLL lockup time (Tplllock), input twice TR pulse.

Input more than 100 cycle MCLK clocks between 1st. TR and 2nd. TR.

6. After that, sync clock will be outputted from M66239FP.

FSET<2:0> set (refer to page 20)

More than 1000 cycles

VCC

Serial

resister

MCLK

FSET

TR

RESET

CKO/CKOB/PULSE

More than 100 cycles

Tplllock

Note: 1. In case of change the resister set after complete above power on procedure, the new resister set value reflects

after the at least more twice TR pulse input. And when changing register 4, for the center frequency purpose

to be changed, the locked time of PLL must be wait. Also,there is not a problem even if a trigger signal is

entered before the PLL lock after changing register 4. When changing a register except register 4, not need

to wait locked time of PLL.

Setting

completed

Input clock frequency

is stable

Serial resister set (refer to page 15 to 17)

Figure 11 After Power-On Procedure