AD8244

Data Sheet

Rev. A | Page 14 of 20

THEORY OF OPERATION

+VS

+VS

–VS

+VS

–VS

–VS

IN

OUT

500Ω

Figure 38. Simplified Schematic

OVERVIEW

The AD8244 is a precision, quad, FET input, unity-gain buffer

that is designed to isolate very large source impedances from

the rest of the signal chain. N-channel JFETs are used as the

input transistors to provide a low offset (350 μV maximum),

low noise (13 nV/√Hz typical), high impedance (more than

10 TΩ) input stage that operates right down to the negative supply

voltage. Using a new drift trimming method, the B grade AD8244

is able to achieve very low offset voltage over temperature

(0.545 mV maximum), and it introduces minimal system error

over temperature. The AD8244 design is optimized for high

precision applications, such as buffers for biopotential electrodes,

where it is important that buffers have very high impedance

inputs and channels that match closely. Because the AD8244

fits into a 10-lead package, whereas a quad op amp requires a

minimum of 14 leads, routing space is reduced and parasitics

from the feedback traces are eliminated. Furthermore, the

flexible design and the high channel density of the AD8244

allow it to be used in the signal chain anywhere a unity-gain

buffer is needed.

GUARDING

When using low input bias current FET input amplifiers,

designers must pay careful attention to voltage gradients from

the input node to adjacent conductors on the board. These

gradients can create leakage currents that overwhelm the input

impedance and bias current performance of the FET input.

These leakage currents get much worse with contamination,

humidity, and temperature. Guarding techniques can be used to

protect against parasitic leakage currents by greatly reducing the

voltage gradient seen by the input node. Physically, a guard is a

low impedance conductor that surrounds a high impedance

node and is raised to the voltage of that node. It serves to buffer

leakage by diverting it away from the sensitive node and into

the low impedance guard. A complication results from the fact

that many traditional op amp pinouts place a supply pin next to

the noninverting input. The only way to guard the input of one

of these op amps is to route the guard trace between the input

pin and the supply pin. Traces can be routed between pins for

large packages, such as DIP or even SOIC; however, the board

area consumed by these packages is prohibitive for many

modern applications.

3

–VS 4

+VS

OUT

8

7

6

5

1

–IN

2

+IN 3

–VS 4

8

+VS

7

OUT

6

5

LARGE FOOTPRINT

PACKAGES

SMALL FOOTPRINT

PACKAGES

INPUT

INPUT

GUARD

GUARD

GUARD

GUARD

SINGLE

OP AMP

SINGLE

OP AMP

*LEAKAGE PATH FROM +IN TO –VS

CAUSES LARGE INPUT CURRENT

–IN 2

+IN

1

Figure 39. Single Op Amp Guarding Patterns

The AD8244 solves this problem with a unique pinout that

naturally isolates the high impedance inputs from the low

impedance nodes, such as the supplies and outputs of the other

buffers. Additionally, the buffers of the AD8244 can be used to

guard their own inputs, reducing the voltage gradient seen by the

input to only the low offset voltage of the buffer. The AD8244

facilitates this by making guard traces easy to route without the

need for traces to go between pins.

OUT A

IN A

1

2

3

+VS

GUARD TRACE SURROUNDS INPUT NODE

GUARD TRACE

FROM SENSOR

SOLDER MASK REMOVED

IN A

OUT A

AD8244

Figure 40. Guarding with the AD8244