2000 Jul 03

11

Philips Semiconductors

Product specification

10-bit high-speed low-power ADC

TDA8764A

7. The analog input settling time is the minimum time required for the input signal to be stabilized after a sharp full-scale

input (square wave signal) in order to sample the signal and obtain correct output data.

8. Effective bits are obtained via a Fast Fourier Transform (FFT) treatment taking 8K acquisition points per equivalent

fundamental period. The calculation takes into account all harmonics and noise up to half of the clock frequency

(Nyquist frequency). Conversion to signal-to-noise ratio: S/N = EB

× 6.02 + 1.76 dB.

9. Intermodulation measured relative to either tone with analog input frequencies of 4.5 and 4.3 MHz. The two input

signals have the same amplitude and the total amplitude of both signals provides full-scale to the converter.

the lowest possible output load. These parameters are guaranteed by characterization and not by production test.

handbook, halfpage

RLAD

ROT

VRT

VRM

VRB

ROB

code 1023

code 0

FCE256

IL

RL

Fig.4 Explanation of note 4.