Data Sheet

AD8515

Rev. E | Page 13 of 16

DRIVING CAPACITIVE LOADS

Most amplifiers have difficulty driving large capacitive loads.

Additionally, higher capacitance at the output can increase the

amount of overshoot and ringing in the amplifier’s step response

and can even affect the stability of the device. This is due to the

degradation of phase margin caused by additional phase lag from

the capacitive load. The value of capacitive load that an amplifier

can drive before oscillation varies with gain, supply voltage, input

signal, temperature, and other parameters. Unity gain is the most

challenging configuration for driving capacitive loads. TheAD8515

is capable of driving large capacitive loads without any external

compensation. The graphs in Figure 31 and Figure 32 show the

amplifier’s capacitive load driving capability when configured

in unity gain of +1.

The AD8515 is even capable of driving higher capacitive loads

in inverting gain of −1, as shown in Figure 33.

TIME (1µs/DIV)

VS = ±2.5V

CL = 50pF

GAIN = 1

Figure 31. Capacitive Load Driving @ CL = 50 pF

TIME (1µs/DIV)

VS = ±2.5V

CL = 500pF

GAIN = 1

Figure 32. Capacitive Load Driving @ CL = 500 pF

TIME (1µs/DIV)

VS = ±0.9V

CL = 800pF

GAIN = –1

Figure 33. Capacitive Load Driving @ CL = 800 pF

FULL POWER BANDWIDTH

The slew rate of an amplifier determines the maximum frequency

at which it can respond to a large input signal. This frequency

(known as full power bandwidth, FPBW) can be calculated from

the equation

PEAK

V

SR

FPBW

×

π

=

2

for a given distortion. The FPBW of the AD8515 is shown in

Figure 34 to be close to 200 kHz.

TIME (2µs/DIV)

VIN

VOUT

Figure 34. Full Power Bandwidth