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TDA9614H 数据表(PDF) 13 Page - NXP Semiconductors |
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TDA9614H 数据表(HTML) 13 Page - NXP Semiconductors |
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13 / 60 page ![]() 1995 Mar 21 13 Philips Semiconductors Preliminary specification Audio processor for VHS hi-fi and linear audio TDA9614H Fig.4 Timing diagram of automatic calibration. handbook, full pagewidth MBE281 max 240 ms max 240 ms max 10 ms HID CALS LEFT OSCILLATOR RIGHT OSCILLATOR CALR BANDPASS FILTERS If CALS is reset during CALR = 0, the calibration will be stopped if it was not finished yet. If required, a new calibration can be started using CALS. WARNING: the IC should not be calibrated in a test or standby mode. 6.3.4 PAL/NTSC MODE Depending on bit NTSC the IC is calibrated in PAL or NTSC mode using bit CALS. After an automatic calibration the oscillator frequencies can be switched between PAL and NTSC using bit NTSC. This centre frequency shift is done without automatic calibration. During playback (PB) or loop-through (LT) a change in bit NTSC will automatically calibrate the bandpass filters again. This will take <10 ms. WARNING: A change of PB to REC, LT to REC and PAL to NTSC should not be combined in one transmitted byte. The PAL to NTSC transition should be preceded by the PB to REC or LT to REC transition. 6.4 I2C-bus The TDA9614H is controlled via the 2-wire I2C-bus, in accordance with the I2C-bus specification. As slave receiver for programming there is one module address, with R/W bit = 0, a subaddress byte and eight data bytes. If more than one data byte follows the subaddress, these bytes are stored in the successive registers by the automatic address increment feature. As slave transmitter (R/W bit = 1) there is one read byte. |
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