Data Sheet

ADA4857-1/ADA4857-2

Rev. D | Page 13 of 21

Figure 32. Open-Loop Gain and Phase vs. Frequency

Figure 33. Input Overdrive Recovery for Various Resistive Loads

Figure 34. Power Supply Rejection Ratio (PSRR) vs. Frequency

Figure 35. PD Isolation vs. Frequency

Figure 36. Output Overdrive Recovery for Various Resistive Loads

Figure 37. Common-Mode Rejection Ratio (CMRR) vs. Frequency

PHASE

GAIN

–10

0

10

20

30

40

50

60

80

70

0.1

–180

–160

–140

–120

–100

–80

–60

–40

–20

0

1

10

100

1000

FREQUENCY (MHz)

VS = ±5V

RL = 1kΩ

TIME (40ns/DIV)

8

–8

6

–6

–4

4

–2

0

2

OUTPUT

RL = 100Ω

OUTPUT

RL = 1kΩ

INPUT

VS = ±5V

G = +1

–30

–20

–10

0

10

–80

–70

–60

–50

–40

0.1

1

10

100

1000

FREQUENCY (MHz)

–PSRR

+PSRR

VS = ±5V

RL= 1kΩ

SOIC

LFCSP

–30

–20

–10

0

–100

–70

–80

–90

–60

–50

–40

0.1

1

10

100

1000

FREQUENCY (MHz)

G = +2

VS = ±5V

RL = 1kΩ

PD = 3V

TIME (200ns/DIV)

8

–8

6

–6

–4

4

–2

0

2

OUTPUT

RL = 100Ω

OUTPUT

RL = 1kΩ

2 × INPUT

VS = ±5V

G = +2

–30

–90

–80

–70

–60

–50

–40

0.1

1

10

100

1000

FREQUENCY (MHz)

VS = ±5V

RL= 1kΩ