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DSPIC30F2011 数据表(PDF) 49 Page - Microchip Technology |
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DSPIC30F2011 数据表(HTML) 49 Page - Microchip Technology |
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49 / 205 page ![]() © 2006 Microchip Technology Inc. DS70139E-page 47 dsPIC30F2011/2012/3012/3013 5.0 FLASH PROGRAM MEMORY The dsPIC30F family of devices contains internal pro- gram Flash memory for executing user code. There are two methods by which the user can program this memory: 1. Run-Time Self-Programming (RTSP) 2. In-Circuit Serial Programming™ (ICSP™) 5.1 In-Circuit Serial Programming (ICSP) dsPIC30F devices can be serially programmed while in the end application circuit. This is simply done with two lines for Programming Clock and Programming Data (which are named PGC and PGD respectively), and three other lines for Power (VDD), Ground (VSS) and Master Clear (MCLR). This allows customers to manu- facture boards with unprogrammed devices, and then program the microcontroller just before shipping the product. This also allows the most recent firmware or a custom firmware to be programmed. 5.2 Run-Time Self-Programming (RTSP) RTSP is accomplished using TBLRD (table read) and TBLWT (table write) instructions. With RTSP, the user may erase program memory, 32 instructions (96 bytes) at a time and can write program memory data, 32 instructions (96 bytes) at a time. 5.3 Table Instruction Operation Summary The TBLRDL and the TBLWTL instructions are used to read or write to bits<15:0> of program memory. TBLRDL and TBLWTL can access program memory in Word or Byte mode. The TBLRDH and TBLWTH instructions are used to read or write to bits<23:16> of program memory. TBLRDH and TBLWTH can access program memory in Word or Byte mode. A 24-bit program memory address is formed using bits<7:0> of the TBLPAG register and the Effective Address (EA) from a W register specified in the table instruction, as shown in Figure 5-1. FIGURE 5-1: ADDRESSING FOR TABLE AND NVM REGISTERS Note: This data sheet summarizes features of this group of dsPIC30F devices and is not intended to be a complete reference source. For more information on the CPU, peripherals, register descriptions and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). 0 Program Counter 24 bits NVMADRU Reg 8 bits 16 bits Program Using TBLPAG Reg 8 bits Working Reg EA 16 bits Using Byte 24-bit EA 1/0 0 1/0 Select Table Instruction NVMADR Addressing Counter Using NVMADR Reg EA User/Configuration Space Select |
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