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PIC16F506T-I/P 数据表(PDF) 91 Page - Microchip Technology |
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PIC16F506T-I/P 数据表(HTML) 91 Page - Microchip Technology |
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91 / 116 page  © 2007 Microchip Technology Inc. Preliminary DS41268C-page 89 PIC12F510/16F506 TABLE 13-1: COMPARATOR SPECIFICATIONS TABLE 13-2: COMPARATOR VOLTAGE REFERENCE (CVREF) SPECIFICATIONS TABLE 13-3: A/D CONVERTER CHARACTERISTICS (PIC12F510/16F506) Sym Characteristics Min Typ Max Units Comments VOS Input Offset Voltage — ±3 ±10 mV VCM Input Common Mode Voltage 0 — VDD – 1.5 V CMRR Common Mode Rejection Ratio +55* — — dB TRT Response Time(1) — 150 400* ns Internal VIVRF Internal Voltage Reference 0.550 0.6 0.650 V * These parameters are characterized but not tested. Note 1: Response time measured with one comparator input at (VDD – 1.5)/2, while the other input transitions from VSS to VDD – 1.5V. Sym Characteristics Min Typ Max Units Comments CVRES Resolution — — VDD/24* VDD/32 — — LSb LSb Low Range (VRR = 1) High Range (VRR = 0) Absolute Accuracy — — — — ±1/2* ±1/2* LSb LSb Low Range (VRR = 1) High Range (VRR = 0) Unit Resistor Value (R) — — 2K* — Ω Settling Time(1) —— 10* μs * These parameters are characterized but not tested. Note 1: Settling time measured while VRR = 1 and VR<3:0> transitions from 0000 to 1111. Param No. Sym Characteristic Min Typ† Max Units Conditions A01 NR Resolution — — 8 bits bit A03 EIL Integral Error — — ± 2 LSb VDD = 5.0V A04 EDL Differential Error — — -1 < EDL ≤ 2 LSb No missing codes to 8 bits VDD = 5.0V A05 EFS Full-scale Range 2 — 5.5* V VDD A06 EOFF Offset Error — — ± 2 LSb VDD = 5.0V A07 EGN Gain Error — — ± 2 LSb VDD = 5.0V A10 — Monotonicity — guaranteed(2) —— VSS ≤ VAIN ≤ VDD A25 VAIN Analog Input Voltage VSS —VDD V VSS —0.9 VDD V T > 85°C and FOSC > 10 MHz only A30 ZAIN Recommended Impedance of Analog Voltage Source —— 10 k Ω * These parameters are characterized but not tested. † Data in the “Typ” column is at 5.0V, 25°C unless otherwise stated. These parameters are for design guidance only are not tested. Note 1: Total Absolute Error includes integral, differential, offset and gain errors. 2: The A/D conversion result never decreases with an increase in the input voltage and has no missing codes. 3: When A/D is off, it will not consume any current other than leakage current. The power-down current specification includes any such leakage from the A/D module. |
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