1999 Oct 05

13

Philips Semiconductors

Preliminary specification

noise frequency synthesizer

TSA5059

Notes

1. Asymmetrical drive on pin RFA or RFB; see Fig.3.

2. The drive level is expected with the crystal at series resonance with a series resistance of 50

Ω. The value will be

different with another crystal.

3. To drive pin XTAL from the pin XT/COMP of another TSA5059, couple the signal through a capacitor of 1 nF

(to remove the DC level), in series with an 1.2 k

Ω resistor, see Fig.5.

Tuning voltage output (pin VT)

leakage current when switched off

XCE = 0; XCS = 1;

−−

−10

µA

output voltage

when the loop is

locked; normal mode;

resistor of 27 k

Ω

0.25

−

32.7

V

XT/COMP output (pin XT/COMP)

AC output voltage (peak-to-peak value)

XCE = 1

−

400

−

mV

Input/output and output ports (pins P0, P1, P2 and P3)

port leakage current

−−

10

µA

output port saturation voltage

−

0.2

0.4

V

LOW-level input voltage

−−

1.5

V

HIGH-level input voltage

3.0

−−

V

ADC input (pin ADC)

HIGH-level input leakage current

−−

10

µA

LOW-level input leakage current

−10

−−

µA

Address selection (pin AS)

HIGH-level input leakage current

−−

1mA

LOW-level input leakage current

−0.5

−−

mA

SCL and SDA inputs (pins SCL and SDA)

LOW-level input voltage

−−

1.5

V

HIGH-level input voltage

2.3

−−

V

HIGH-level input leakage current

−−

10

µA

−−

10

µA

LOW-level input leakage current

−10

−−

µA

SCL clock frequency

−−

400

kHz

SDA output (pin SDA)

output voltage during acknowledge

−−

0.4

V

−−

0.6

V

SYMBOL

PARAMETER

CONDITIONS

MIN.

TYP.

MAX.

UNIT