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PIC16F631-E/ML 数据表(PDF) 13 Page - Microchip Technology |
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PIC16F631-E/ML 数据表(HTML) 13 Page - Microchip Technology |
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13 / 294 page ![]() © 2007 Microchip Technology Inc. DS41262D-page 11 PIC16F631/677/685/687/689/690 FIGURE 1-3: PIC16F685 BLOCK DIAGRAM Power-up Timer Oscillator Start-up Timer Power-on Reset Watchdog Timer Brown-out Reset RB4 RB5 RB6 RB7 Flash Program Memory 13 Data Bus 8 14 Program Bus Instruction Reg Program Counter RAM File Registers Direct Addr 7 RAM Addr 9 Addr MUX Indirect Addr FSR Reg STATUS Reg MUX ALU W Reg Instruction Decode and Control Timing Generation OSC1/CLKI OSC2/CLKO PORTA 8 8 8 3 8-Level Stack (13-bit) 256 bytes 4K x 14 VDD RA0 RA1 RA2 RA3 RA4 RA5 INT Configuration Internal Oscillator MCLR Block PORTC RC0 RC1 RC2 RC3 RC4 RC5 RC6 RC7 PORTB VSS 8 ECCP+ CCP1/ P1B P1C P1D P1A Data EEPROM 256 Bytes EEDAT EEADR 2 Timer0 Timer1 Analog Comparators Analog-To-Digital Converter C1IN- C1IN+ C1OUT VREF and Reference C2IN- C2IN+ C2OUT AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN8 AN9 AN10 AN11 AN7 T1G T1CKI T0CKI Timer2 Ultra Low-Power Wake-up ULPWU |
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