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H838024R 数据表(PDF) 13 Page - Renesas Technology Corp

部件名 H838024R
功能描述  Renesas 8-Bit Single-Chip Microcomputer Super Low Power Series
PDF  697 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H838024R 数据表(HTML) 13 Page - Renesas Technology Corp

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Rev. 7.00 Mar 10, 2005 page xiii of xlii
Item
Page
Revision (See Manual for Details)
5.1 Overview
Figure 5.1 Mode
Transition Diagram
120
Notes amended
Notes: 1. A transition between different modes cannot be
made to occur simply because an interrupt request is
generated. Make sure that interrupts are enabled.
5.1.1 System Control
Registers
System Control
Register 1 (SYSCR1)
Bits 6 to 4
123
Note amended
Note:
If an external clock is being input, set standby timer select to
external clock mode before mode transition. Also, do not set
standby timer select to external clock mode if no external clock
is used. 8,192 states (STS2 = STS1 = STS0 = 0) is
recommended if the on-chip oscillator is used on the H8/38124
Group.
System Control
Register 2 (SYSCR2)
Bit 4
125
Description amended
When
φ
OSC = 2 to 20 MHz, clear NESEL to 0.
5.3.3 Oscillator
Stabilization Time
after Standby Mode is
Cleared
Table 5.4(1) Clock
Frequency and
Stabilization Time
(H8/38024,
H8/38024S,
H8/38024R Group)
Table 5.4(2) Clock
Frequency and
Stabilization Time
(H8/38124 Group)
129
Table amended
Wait Time
2 states
(Use prohibited with other than
external clock)
6.1 Overview
143
Description amended and note deleted
F-ZTAT™ versions of the H8/38124 and H8/38122 are
available. The former has 32 Kbytes, and the latter 16 Kbytes,
of flash memory.



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