Data Sheet

LT4423

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Rev. 0

12 of 18

PCB traces to the IN and OUT pins should be wide and short to minimize series resistance and inductance. Figure 17

demonstrates a copper layout strategy for effective thermal and electrical performance.

Figure 17. PCB Layout Strategy for Thermal Management

TYPICAL APPLICATIONS

High-Load Current Application

Some applications may require a power path that exceeds the 2A capability of the LT4423. The STATUS output may

be used to enable an alternate power path. For example, consider the application shown in Figure 18. The LT4423

provides an automatic power path from the battery input to the 4Ω load when the 28V supply is not present. When

the 28V supply (VIN2) becomes available, VOUT begins to charge through the MOSFET body diode, and the LT4423 shuts

off due to the reverse bias from VOUT to VIN1. STATUS pulls low, allowing the P-channel MOSFET to turn on, providing

a low-loss power path to the load.

Without protection components, the P-channel MOSFET VGS could see 28V, which would be beyond the MOSFET

absolute maximum rating. The zener diode limits the maximum VGS on the MOSFET to 5.1V. R1 provides a discharge

path for the MOSFET gate charge and a pull-up path for the STATUS output when the MOSFET is off.

If a logic-level STATUS voltage is required, R2 may be added to limit the voltage swing at the STATUS pin. When the

LT4423 power path is on, STATUS pulls up to the battery voltage. When the LT4423 power path is off and R2 is not

present, STATUS pulls to 4 or 5V (Vz) below the 28V supply. With R2 in place, the STATUS pull-down current causes a

voltage drop on R2, allowing the STATUS output to pull near ground. The pull-down current (28V - VZ)/R2 is shared

between R1 and the zener diode.