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MP86950GLVT 数据表(PDF) 5 Page - Monolithic Power Systems

部件名 MP86950GLVT
功能描述  Intelli-Phase TM Solution, Monolithic Half-Bridge with Integrated Internal Power MOSFETs and Gate Drivers
PDF  15 Pages
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制造商  MPS [Monolithic Power Systems]
网页  http://www.monolithicpower.com
标志 MPS - Monolithic Power Systems

MP86950GLVT 数据表(HTML) 5 Page - Monolithic Power Systems

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MP86950
– INTELLI-PHASETM SOLUTION
W/ INTEGRATED MOSFETS AND DRIVERS
MP86950 Rev. 1.0
www.MonolithicPower.com
5
12/18/2020
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2020 MPS. All Rights Reserved.
ELECTRICAL CHARACTERISTICS
VIN = 12V, VDRV = VDD = VEN = 3.3V, tested at TA = 25°C for typical values and TJ = -40°C to +125°C
for minimum and maximum values, unless otherwise noted.
Parameter
Symbol
Condition
Min
Typ
Max
Units
IIN shutdown
IVIN_OFF
EN = low
40
μA
VIN under-voltage
lockout (UVLO) rising
threshold
2.5
3.0
V
VIN UVLO hysteresis
threshold
600
mV
Quiescent current
IVDRV
EN = low
60
μA
IVDRV
PWM = low
4
5.08
mA
VDD voltage UVLO rising
threshold
2.75
2.95
V
VDD voltage UVLO
hysteresis threshold
275
mV
High-side (HS) current
limit (5)
ILIM_FLT
Cycle-by-cycle, up to four cycles
75
A
Low-side (LS) current
limit (5)
Negative cycle-by-cycle current
limit, no fault report
-30
A
Negative LS current limit
off time (5)
40
ns
HS current limit
shutdown counter (5)
4
times
EN input low voltage
0.8
V
EN input high voltage
2.30
V
Dead time rising (5)
3
ns
Dead time falling (5)
Positive inductor current
6
ns
Negative inductor current
35
ns
PWM high to SW rising
delay (5)
tRISING
15
ns
PWM low to SW falling
delay (5)
tFALLING
15
ns
PWM tri-state to SW Hi-Z
delay (5)
tLT
40
ns
tTL
20
ns
tHT
40
ns
tTH
20
ns



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