Data Sheet

ADL9005

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

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Rev. A | 6 of 24

Figure 2. Pin Configuration

Table 8. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

RBIAS

Current Mirror Bias Resistor Pin. Use the RBIAS pin to set the IDQ by connecting an external bias resistor as defined in

Table 9. Refer to Figure 74 for the bias resistor connection. See Figure 3 for the interface schematic.

2, 6 to 10, 13, 14, 18 to 22

NC

No Internal Connection. Note the data shown herein was measured with these pins externally connected to the RF and

dc ground.

3, 5, 15, 17

GND

Ground. The GND pins must be connected to RF and dc ground. See Figure 4 for the interface schematic.

4

RFIN

RF Input. The RFIN pin is dc-coupled and matched to 50 Ω. See Figure 5 for the interface schematic.

11

ACG1

AC Grounding 1. A capacitor is required on the ACG1 pin to provide low frequency decoupling. Refer to Figure 74 for the

capacitor value. See Figure 5 for the interface schematic.

12

ACG2

AC Grounding 2. A capacitor is required on the ACG2 pin to provide low frequency decoupling. Refer to Figure 74 for the

capacitor value. See Figure 5 for the interface schematic.

16

RFOUT/VDD

RF Output (RFOUT)/Drain Voltage for Amplifier (VDD). The RFOUT/VDD pin is dc-coupled and matched to 50 Ω. See Figure

6 for the interface schematic.

23

ACG3

AC Grounding 3. A capacitor is required on the ACG3 pin to provide low frequency decoupling. Refer to Figure 74 for the

capacitor value. See Figure 6 for the interface schematic.

24

ACG4/VDD2

AC Grounding 4 (ACG4). A capacitor is required on the ACG4 pin to provide low frequency decoupling. Refer to Figure

74 for the capacitor value. See Figure 6 for the interface schematic.

Optional Drain Voltage for the Amplifier that Requires a Higher Voltage (VDD2). Do not use the VDD2 pin simultaneously

with RFOUT/VDD. See Figure 6 for the interface schematic.

EPAD

Exposed Pad. The exposed pad must be connected to RF and dc ground.