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STAC9752 数据表(PDF) 21 Page - Integrated Device Technology |
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STAC9752 数据表(HTML) 21 Page - Integrated Device Technology |
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21 / 95 page ![]() STAC9752/9753 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING IDT™ 21 STAC9752/9753 REV 3.3 1206 TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING 3.1. Split Independent Power Supply Operation In PC applications, one power supply input to the STAC9752/9753 may be derived from a supply regulator and the other directly from the PCI power supply bus. When power is applied to the PC, the regulated supply input to the IC will be applied some time delay after the PCI power supply. Without proper on-chip partitioning of the analog and digital circuitry, some manufacturer's CODECs would be subject to on-chip SCR type latch-up. IDT’s STAC9752/9753 specifically allows power-up sequencing delays between the analog (AVddx) and digital (VDddx) supply pins. These two power supplies can power-up independently and at dif- ferent rates with no adverse effects to the CODEC. The IC is designed with independent analog and digital circuitry that prevents on-chip SCR type latch-up. However, the STAC9752/9753 is not designed to operate for extended periods with only the analog supply active. |
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