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AM69 数据表(PDF) 7 Page - Texas Instruments |
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AM69 数据表(HTML) 7 Page - Texas Instruments |
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7 / 312 page  Table 4-1. Device Comparison (continued) FEATURES(9) REFERENCE NAME AM69A98 AM69A94 AM69A78 AM6958 AM6954 PERIPHERALS Display Subsystem DSS Yes DSI 4L TX 2 eDP 4L 1 DPI 1 Modular Controller Area Network Interface with Full CAN-FD Support MCAN 20 General-Purpose I/O GPIO 155 Inter-Integrated Circuit Interface I2C 10 Improved Inter-Integrated Circuit Interface I3C 1 Analog-to-Digital Converter ADC 2 Capture Subsystem with Camera Serial Interface (CSI2) CSI2.0 4L RX 3 CSI2.0 4L TX 2 Multichannel Serial Peripheral Interface MCSPI 11 Multichannel Audio Serial Port MCASP0 16 Serializers MCASP1 5 Serializers MCASP2 5 Serializers MCASP3 3 Serializers MCASP4 5 Serializers MultiMedia Card/ Secure Digital Interface MMCSD0 eMMC (8-bits) MMCSD1 SD/SDIO (4-bits) Universal Flash Storage UFS 2L No Flash Subsystem (FSS) OSPI0 8-bits(8) OSPI1(10) 4-bits HyperBus Yes(8) 4x PCI Express Port with Integrated PHY PCIE 2x4L or 4x2L(6) (13) Ethernet Interfaces MCU CPSW2G RMII or RGMII MAIN CPSW2G RMII or RGMII CPSW9G 8port SERDES(6) 4port SERDES(6) (7) 8port SERDES(6) 4port SERDES(6) (7) General-Purpose Timers TIMER 30 Enhanced High Resolution Pulse-Width Modulator Module eHRPWM 6 Enhanced Capture Module eCAP 3 Enhanced Quadrature Encoder Pulse Module eQEP 3 Universal Asynchronous Receiver and Transmitter UART 12 Universal Serial Bus (USB3.1) SuperSpeed Dual-Role-Device (DRD) Ports with SS PHY USB0 Yes(6) (1) Functional Safety is not supported on this device family, if interested in this feature, please see the TDA4VH device family. (2) Device security features including Secure Boot and Customer Programmable Keys are applicable to select part number variants as indicated by the Device Type (Y) identifier in the in the Nomenclature Description table (3) AEC-Q100 qualification is applicable to select part number variants as indicated by the Automotive Designator (Q1) identifier in the Nomenclature Description table (4) DDRSS2 and DDRSS3 are not available on the 27mm package variant of this SoC. DDR2/DDR3 should be not be used if software compatibility is desired with systems that use the 27mm package (5) DDRSS0, DDRSS1, DDRSS2 and DDRSS3 must always be used in incremental order. For instance, when using a single LPDDR component, it must be connected to DDR0_* interface. When using two LPDDR components, they must be connected to DDR0_* and DDR1_* interfaces, and so forth. (6) DP, SGMII, USB3.0, and PCIE share a total of 16 SerDes lanes (31mm package) or 12 SerDes lanes (27mm package variant). SERDES2 is not available on the 27mm package variant of this SoC. (7) AM69, AM69A CPSW supports up to 8 ports using the following instances and signals and modes of operation: • PORT1 Signals: SGMII1, Modes: One of 5Gb, 10Gb USXGMII/XFI, 2.5Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII • PORT2 Signals: SGMII2, Modes: One of 5Gb, 10Gb USXGMII/XFI, 2.5Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII • PORTn (n=3 thru 8) Signals: SGMIIn, Modes: One of 2.5Gb SGMII/XAUI, 1Gb SGMII, 5Gb QSGMII If QSGMII is used on any SGMII Port 1 thru 4, then SGMII1/2/3/4 cannot be used for Ethernet functionality since all 4 internal CPSW ports map to the selected QSGMII SERDES port. www.ti.com AM69A, AM69 SPRSP92C – FEBRUARY 2023 – REVISED JUNE 2024 Copyright © 2024 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: AM69A AM69 |
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