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ADIS16IMU5/PCBZ 数据表(PDF) 44 Page - Analog Devices |
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ADIS16IMU5/PCBZ 数据表(HTML) 44 Page - Analog Devices |
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44 / 46 page ![]() Data Sheet ADIS16575/ADIS16576/ADIS16577 APPLICATIONS INFORMATION analog.com Rev. 0 | 44 of 46 EVALUATION TOOLS Breakout Board, ADIS16IMU5/PCBZ The ADIS16IMU5/PCBZ breakout board provides a ribbon cable interface for a simple connection to an embedded processor devel- opment system. Figure 76 shows the electrical schematic, and Figure 78 shows a top view for this breakout board. J2 mates directly to the electrical connector on the ADIS16575/ADIS16576/ ADIS16577, and J1 easily mates to a 1 mm ribbon cable system. Figure 76. ADIS16IMU5/PCBZ Electrical Schematic Figure 77. ADIS16IMU5/PCBZ Top View Figure 78. ADIS16IMU5/PCBZ J1 Pin Assignments EVAL-ADIS-FX3 PC-Based Evaluation The ADIS16IMU5/PCBZ provides a simple way to connect the ADIS16575/ADIS16576/ADIS16577 to the EVAL-ADIS-FX3 evalua- tion system, which provides a PC-based method for evaluating essential function and performance. For more information, visit the EVAL-ADIS-FX3 Wiki Guide. SPI OPERATION Validating SPI Communications The ADIS16575/ADIS16576/ADIS16577 provide multiple mecha- nisms to validate and verify SPI transactions, ensuring reliable communication. SPI Error Bit The DIAG_STAT register includes an SPI communication error bit (Bit 3). This bit is set to 1 when an SPI communication error is detected, such as an incorrect number of clock cycles (see Table 15). Regularly checking this bit can help identify communication issues. Burst Read Checksum When performing a burst read operation, a 16-bit checksum is included at the end of the data stream. This checksum allows the host system to verify the integrity of the received data. To validate this checksum, take the following steps: ► Calculate the checksum of the received data (excluding FIFO_CNT). ► Compare this checksum with the checksum value received in burst read mode. ► If these checksums match, the data transfer was likely success- ful. |
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