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AS6C6264 数据表(PDF) 1 Page - Alliance Semiconductor Corporation |
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AS6C6264 数据表(HTML) 1 Page - Alliance Semiconductor Corporation |
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1 / 12 page ![]() 8K X 8 BIT LOW POWER CMOS SRAM FEATURES Access time :55ns Low power consumption: Operation current : 15mA (TYP.), VCC = 3.0V Standby current : 1 µ A (TYP.), VCC = 3.0V Wide range power supply : 2.7 ~ 5.5V Fully static operation Tri-state output Data retention voltage : 2.0V (MIN.) All products ROHS Compliant Package : 28-pin 600 mil PDIP 28-pin 330 mil SOP 28-pin 8mm x 13.4mm sTSOP GENERAL DESCRIPTION The AS6C6264 is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using very high performance, high reliability CMOS technology. Its standby current is stable within the range of operating temperature. The AS6C6264 is well designed for low power application, and particularly well suited for battery back-up nonvolatile memory application. The AS6C6264 operates with wide range power supply. FUNCTIONAL BLOCK DIAGRAM DECODER I/O DATA CIRCUIT CONTROL CIRCUIT 8Kx8 MEMORY ARRAY COLUMN I/O A0-A12 Vcc Vss DQ0-DQ7 CE# WE# OE# CE2 PIN DESCRIPTION SYMBOL DESCRIPTION A0 - A12 Address Inputs DQ0 – DQ7 Data Inputs/Outputs CE#, CE2 Chip Enable Inputs WE# Write Enable Input OE# Output Enable Input VCC Power Supply VSS Ground NC No Connection ® Fully Compatible with all Competitors 5V product Fully Compatible with all Competitors 3.3V product February 2007 AS6C6264 02/Feb/07, v1.0 Alliance Memory Inc Page 1 of 12 |
类似零件编号 - AS6C6264 |
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类似说明 - AS6C6264 |
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