TS3405CS datasheet(7/10 Pages) TSC

7 / 10 page

Application Guidelines

Component Selection

Input Capacitor

Use a mix of input bypass capacitors to control the

voltage overshoot across the MOSFETs. Use small

ceramic capacitors for high frequency decoupling and

bulk capacitors to supply the current needed each time

Q1 turn on. Place the small ceramic capacitors physically

close to the MOSFETs and between the drain of high

side MOSFET (Q1) and the source of low side MOSFET

(Q2).

The important parameters for the bulk input capacitor are

the voltage rating and the RMS current rating. For

reliable operation, select the bulk capacitor with voltage

and current rating above the maximum input voltage and

largest RMS current required by the circuit. The capacitor

voltage rating should be at least 1.25 times greater than

the maximum input voltage and a voltage rating of 1.5

times is a conservative guideline. The RMS current rating

requirement for the input capacitor of a buck regulator is

approximately 1/2 the DC load current.

For a through hole design, several electrolytic capacitors

may be needed. For surface mount designs, solid

tantalum capacitors can be used, but caution must be

exercised with regard to the capacitor surge current

rating. These capacitors must be capable of handling the

surge-current at power-up. Some capacitor series

available from reputable manufacturers are surge current

tested.

MOSFET

The TS3405 requires 2 N-channel power MOSFETs.

These should be selected based upon Rds(on), gate

supply

requirements,

and

thermal

management

requirements. In high-current applications, the MOSFET

power dissipation, package selection and heatsink are

the dominant design factors. The power dissipation

includes two loss components; conduction loss and

switching loss. The conduction losses are the largest

component of power dissipation for both the upper and

the lower MOSFETs. These losses are distributed

between the two MOSFETs according to duty factor. The

switching losses seen when sourcing current will be

different from the switching losses seen when sinking

current. When sourcing current, the upper MOSFET

realizes most of the switching losses. The lower switch

realizes most of the switching losses when the converter

is sinking current (see the equations below).

These

equations

assume

linear

voltage

current

transitions and do not adequately model power loss due

the reverse-recovery of the upper and lower MOSFET’s

body diode. The gate-charge losses are dissipated by the

TS3405 and do not heat the MOSFETs. However, large

gate-charge increases the switching interval, tSW which

increases the MOSFET switching losses. Ensure that

both MOSFETs are within their maximum junction

temperature at high ambient temperature by calculating

tempature rise according to package thermal-resistance

specifications. a separate heatsink may be necessary

depending upon MOSFET power, package type, ambient

temperature and air flow.

Losses while sourcing current:

PUPPER= Io

2 x Rds(on) x D + ½ Io x Vin x t

SW x FS

PLOWER= Io

2 x Rds(on) x (1– D)

Losses while sinking current:

PUPPER= Io

2 x Rds(on) x D

PLOWER= Io

2 x Rds(on) x (1–D) + ½ Io x Vin x t

SW x FS

Where: D is the duty cycle = Vout / Vin

tSW is the combined switch ON and OFF time

FS is the switching frequency

Given the reduced available gate bias voltage (5V),

logic-level or sub-logic-level transistors should be used

for both N-MOSFETs. Caution should be exercised with

devices exhibiting very low Vgs(on) characteristics. The

shoot through protection present aboard the TS3405 may

be circumvented by there MOSFETs if they have large

parasitic impedances and /or capacitances that would

inhibit the gate of the MOSFET from being discharged

below it’s threshold level before the complementary

MOSFET is turned on.

FIGURE 5、Upper Gate drive bootstrap.

Fig. 5 shows the upper gate drive (Boot pin) supplied by

a bootstrap circuit from Vcc. The boot capacitor. CBOOT,

develops a floating supply voltage referenced to the

Phase pin. The supply is refreshed to a voltage of Vcc

less the boot diode drop (VDP) each time the lower

MOSFET turns on.

TS3405

Dboot

CHF

Cboot

Boot

Vgate

Phase

Lgate

Gng

Vcc

+5V

-5V

TS3405

7-10

2003/12 rev. A

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