LIS331DL

Register description

27/38

HP_coeff[2:1]. These bits are used to configure high-pass filter cut-off frequency ft.

7.4

CTRL_REG3 [interrupt CTRL register] (22h)

7.5

HP_FILTER_RESET (23h)

Dummy register. Reading at this address zeroes instantaneously the content of the internal

high pass-filter. If the high pass filter is enabled all three axes are instantaneously set to 0g.

This allows to overcome the settling time of the high pass filter.

Table 15.

High pass filter cut-off frequency configuration

HPcoeff2,1

ft (Hz)

(ODR=100 Hz)

ft (Hz)

(ODR=400 Hz)

00

2

8

01

1

4

10

0.5

2

11

0.25

1

Table 16.

CTRL_REG3 register

IHL

PP_OD

I2CFG2

I2CFG1

I2CFG0

I1CFG2

I1CFG1

I1CFG0

Table 17.

CTRL_REG3 description

IHL

Interrupt active high, low. Default value 0.

(0: active high; 1: active low)

PP_OD

Push-pull/Open Drain selection on interrupt pad. Default value 0.

(0: push-pull; 1: open drain)

I2CFG2

I2CFG1

I2CFG0

Data Signal on Int2 pad control bits. Default value 000.

(see table below)

I1CFG2

I1CFG1

I1CFG0

Data Signal on Int1 pad control bits. Default value 000.

(see table below)

Table 18.

Data Signal on Int1 pad control bits

I1(2)_CFG2

I1(2)_CFG1

I1(2)_CFG0

Int1(2) Pad

0

0

0

GND

001

FF_WU_1

010

FF_WU_2

0

1

1

FF_WU_1 or FF_WU_2

100

Data ready

1

1

1

Click interrupt