TDA4AEN...Q1 datasheet(3/236 Pages) TI

3 / 236 page

• 1× General-Purpose Memory Controller (GPMC)

up to 133MHz

• OSPI/QSPI with DDR / SDR support

– Support for Serial NAND and Serial NOR Flash

– 4GBytes memory address support

– XIP mode with optional on-the-fly encryption

Technology / Package:

• 16-nm FinFET technology

• 18 mm x 18 mm, 0.65-mm pitch with VCA, 594-pin

FCBGA (AMW)

Companion Power Management Solution:

• Functional Safety-Compliant support up to ASIL-B

or SIL-2 targeted

• TPS6522x PMIC

• TPS6287x Stackable, Fast Transient Bucks

2 Applications

• Front camera systems

• Surround View and park assistance systems

• eMirror/Camera Mirror System (CMS)

• Radar and Lidar based automotive perception

systems

3 Description

The TDA4VEN/TDA4AEN (aka, TDA4-Entry) processor family is an extension of the Jacinto™ 7 automotive-

grade family of heterogeneous Arm® processors targeted at Advanced Driver Assistance System (ADAS)

applications. With embedded Deep Learning (DL), Video, Vision Processing, and 3D Graphics acceleration,

display interface and extensive automotive peripheral and networking options, TDA4VEN/TDA4AEN is built

for a set of cost and power sensitive automotive applications such as NCAP front camera or entry-level park

assistance systems. The cost optimized TDA4VEN/TDA4AEN provides an optimized performance compute for

both traditional and deep learning algorithms at industry leading power/performance ratios with a high level of

system integration to enable scalability and lower costs for advanced automotive platforms supporting multiple

sensor modalities in stand-alone Electronic Control Units (ECUs).

TDA4VEN/TDA4AEN contains up to four Arm® Cortex®-A53 cores with 64-bit architecture, a Vision Processing

Accelerator (VPAC) with Image Signal Processor (ISP) and multiple vision assist accelerators, Deep Learning

(DL), Dense Optical Flow (DOF) video and 3D Graphics accelerators, a Cortex®-R5F MCU Island core and two

Cortex®-R5F cores for Device and Run-time Management. The Cortex-A53s provide the powerful computing

elements necessary for Linux applications as well as the implementation of traditional vision computing based

algorithms. Building on the existing world-class ISP, TI’s 7th generation ISP includes flexibility to process a

broader sensor suite including RGB-InfraRed (RGB-IR), support for higher bit depth, and features targeting

analytics applications. Key cores include TI’s Dense Optical Flow (DOF) accelerator as well two “C7x” next

generation DSP with scalar and vector cores, dedicated “MMA” deep learning accelerator combined with a large

2.25MB L2 memory enabling performance up to 4 TOPS within the lowest power envelope in the industry when

operating at the typical automotive worst case junction temperature of 125°C.

TDA4VEN/TDA4AEN integrates high-speed IOs including a PCIe Gen-3 (1L) and 3-port Gigabit Ethernet switch

with one internal port and two external ports with TSN support. In addition, an extensive peripherals set is

included in TDA4VEN/TDA4AEN to enable system level connectivity such as USB, MMC/SD, four CSI2.0

Camera interface, OSPI, CAN-FD and GPMC for parallel host interface to an external ASIC/FPGA. TDA4VEN/

TDA4AEN supports secure boot for IP protection with the built-in HSM (Hardware Security Module) and

employs advanced power management support for power-sensitive applications. Integrated diagnostics and

safety features support operations up to ASIL-B at SoC level, (ASIL-D systematic level).

Package Information

PART NUMBER

PACKAGE(1)

PACKAGE SIZE(2)

XJ722S5

AMW (FCBGA, 594) with VCA

18mm x 18mm

TDA4VEN...Q1

AMW (FCBGA, 594) with VCA

18mm x 18mm

TDA4AEN...Q1

AMW (FCBGA, 594) with VCA

18mm x 18mm

(1)

For more information, see Mechanical, Packaging, and Orderable Information.

(2)

The package size (length × width) is a nominal value and includes pins, where applicable.

www.ti.com

TDA4VEN-Q1, TDA4AEN-Q1

SPRSP96A – MARCH 2024 – REVISED SEPTEMBER 2024

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