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SP7682EB 数据表(PDF) 3 Page - Exar Corporation

部件名 SP7682EB
功能描述  Backlight and Flash Driver in QFN 3mm x 3mm
PDF  19 Pages
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制造商  EXAR [Exar Corporation]
网页  http://www.exar.com
标志 EXAR - Exar Corporation

SP7682EB 数据表(HTML) 3 Page - Exar Corporation

  SP7682EB Datasheet HTML 1Page - Exar Corporation SP7682EB Datasheet HTML 2Page - Exar Corporation SP7682EB Datasheet HTML 3Page - Exar Corporation SP7682EB Datasheet HTML 4Page - Exar Corporation SP7682EB Datasheet HTML 5Page - Exar Corporation SP7682EB Datasheet HTML 6Page - Exar Corporation SP7682EB Datasheet HTML 7Page - Exar Corporation SP7682EB Datasheet HTML 8Page - Exar Corporation SP7682EB Datasheet HTML 9Page - Exar Corporation Next Button
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Sept 27-07 rev G
SP7682: Backlight and Flash Driver
© 2007 Exar Corporation
Page 3
I
2C SPECIFICATIONS
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
Serial Clock Frequency
fSCL
400
kHz
Bus Free Time Between a STOP and a
START
tBUF
1.3
µs
Hold Time, Repeated START Condition
t HD_STA
0.6
µs
Repeated START Condition Setup Time
t SU,STA
0.6
µs
STOP Condition Setup Time
tSU,STO
0.6
µs
Data Hold Time
tHD,DAT(OUT)
225
900
ns
Input Data Hold Time
tHD,DAT(IN)
0
900
ns
Data Setup Time
tSU,DAT
100
ns
SCL Clock Low Period
tLOW
1.3
µs
SCL Clock High Period
tHIGH
0.6
µs
Rise Time of Both SDA and SCL
Signals, receiving
tR
20+
0.1Cb
300
ns
(Notes2, 3)
Fall Time of Both SDA and SCL
Signals, Receiving
tF
20+
0.1Cb
300
ns
(Note2, 3)
Fall Time of SDA Transmitting
tF.TX
20+
0.1Cb
250
ns
(Note2, 3, 4)
Pulse Width of Spike Suppressed
tSP
0
50
ns
(Note5)
Capacitive Load for Each Bus Line
Cb
400
400
pF
(Note 2)
I²C startup time after UVLO clears
tSRT
1
1
µs
(Note 2)
Note 1: All parameters tested at TA=25 °C. Specifications over temperature are guaranteed by design.
Note 2: Guaranteed by design.
Note 3: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x VDD and 0.7 x VDD.
Note 4: ISINK ≤6mA. Cb =total capacitance of one bus line in pF. tR and tF measured between 0.3 x VDD and 0.7 VDD.
Note5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.
SP7682A: SINGLE LINE PROGRAMMABLE SERIAL INTERFACE SPECIFICATIONS
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
CONDITIONS
SET_BL, SET_FL logic low threshold
VIL
0.4
V
SET_BL, SET_FL logic high threshold
VIH
1.6
V
SET_BL, SET_FL logic low time
tLO
0.5
250
µs
VSET_BL < 0.4V
SET_BL, SET_FL logic high time
tHI
0.5
µs
VSET_BL > 1.6V
SET_BL shutdown delay
tSHDN
225
500
800
µs
VSET_BL < 0.4V
SET_FL shutdown delay
tSHDN
325
500
700
µs
VSET_FL < 0.4V



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